Micro-Fabrication of Planar Inductors for High Frequency DC-DC Power Converters

International audienc

An Overview of Fully Integrated Switching Power Converters Based on Switched-Capacitor versus Inductive Approach and Their Advanced Control Aspects

This paper reviews and discusses the state of the art of integrated switched-capacitor and integrated inductive power converters and provides a perspective on progress towards the realization of efficient and fully integrated DC–DC power conversion. A comparative assessment has been presented to review the salient features in the utilization of transistor technology between the switched-capacitor and switched inductor converter-based approaches. First, applications that drive the need for integrated switching power converters are introduced, and further implementation issues to be addressed also are discussed. Second, different control and modulation strategies applied to integrated switched-capacitor (voltage conversion ratio control, duty cycle control, switching frequency modulation, Ron modulation, and series low drop out) and inductive converters (pulse width modulation and pulse frequency modulation) are then discussed. Finally, a complete set of integrated power converters are related in terms of their conditions and operation metrics, thereby allowing a categorization to provide the suitability of converter technologies

A Comprehensive Review on Planar Magnetics and the Structures to Reduce the Parasitic Elements and Improve Efficiency

Due to the need for highly efficient and compact power electronic converters to operate at higher frequencies, traditional wire-wound magnetics are not suitable. This paper provides a comprehensive review of planar magnetic technologies, discussing their advantages as well as associated disadvantages. An extensive review of the research literature is presented with the aim of suggesting models for planar magnetics. Several strategies are proposed to overcome the limitations of planar magnetics, including winding conduction loss, leakage inductance, and winding capacitance. The goal of this study is to provide engineers and researchers with a clear roadmap for designing planar magnetic devices

Modeling and analysis of power processing systems: Feasibility investigation and formulation of a methodology

A review is given of future power processing systems planned for the next 20 years, and the state-of-the-art of power processing design modeling and analysis techniques used to optimize power processing systems. A methodology of modeling and analysis of power processing equipment and systems has been formulated to fulfill future tradeoff studies and optimization requirements. Computer techniques were applied to simulate power processor performance and to optimize the design of power processing equipment. A program plan to systematically develop and apply the tools for power processing systems modeling and analysis is presented so that meaningful results can be obtained each year to aid the power processing system engineer and power processing equipment circuit designers in their conceptual and detail design and analysis tasks

Design And Implementation Of Up-Conversion Mixer And Lc-Quadrature Oscillator For IEEE 802.11a WLAN Transmitter Application Utilizing 0.18 Pm CMOS Technology [TK7871.99.M44 H279 2008 f rb].

Perlumbaan implementasi litar terkamil radio, dengan kos yang rendah telah menggalakkan penggunaan teknologi CMOS. The drive for cost reduction has led to the use of CMOS technology for highly integrated radios

Integrated phased array systems in silicon

Silicon offers a new set of possibilities and challenges for RF, microwave, and millimeter-wave applications. While the high cutoff frequencies of the SiGe heterojunction bipolar transistors and the ever-shrinking feature sizes of MOSFETs hold a lot of promise, new design techniques need to be devised to deal with the realities of these technologies, such as low breakdown voltages, lossy substrates, low-Q passives, long interconnect parasitics, and high-frequency coupling issues. As an example of complete system integration in silicon, this paper presents the first fully integrated 24-GHz eight-element phased array receiver in 0.18-μm silicon-germanium and the first fully integrated 24-GHz four-element phased array transmitter with integrated power amplifiers in 0.18-μm CMOS. The transmitter and receiver are capable of beam forming and can be used for communication, ranging, positioning, and sensing applications

Multilevel multistate hybrid voltage regulator

In this work, a new set of voltage regulators as well as some controlling methods and schemes are proposed. While normal switched capacitor voltage regulators are easy integrable, they are suffering from charge sharing losses as well as fast degradation of efficiency when deviating from target operation point. On the other hand, conventional buck converters use bulky magnetic components that introduce challenges to integrate them on chip. The new set of voltage regulators covers the gap between inductor-based and capacitor-based voltage regulators by taking the advantages of both of them while avoiding or minimizing their disadvantages. The voltage regulator device consists of a switched capacitor circuit that is periodically switching its output between different voltage levels followed by a low pass filter to give a regulated output voltage. The voltage regulator is capable of converting an input voltage to a wide range of output voltage with a high efficiency that is roughly constant over the whole operation range. By switching between adjacent voltage levels, the voltage drop on the inductor is limited allowing for the use of smaller inductor sizes while maintaining the same performance. The general concept of the proposed voltage regulator as well as some operating conditions and techniques are explained. A phase interleaving technique to operate the multilevel multistate voltage regulator has been proposed. In this technique, the phases of two or more voltage levels are interleaved which enhances the effective switching frequency of the charge transferring components. This results in a further boost in the proposed regulator\u27s performance. A 4-level 4-state hybrid voltage regulator has been introduced as an application on the proposed concepts and techniques. It shows better performance compared to both integrated inductor-based and capacitor-based voltage regulators. The results prove that the proposed set of voltage regulators offers a potential move towards easing the integration of voltage regulators on chip with a performance that approaches that of off-chip voltage regulators

The manufacture and characterisation of microscale magnetic components.

Abstract unavailable please refer to PD

Ferrite-based micro-inductors for power systems on chip : from material elaboration to inductor optimisation

Les composants passifs intégrés sont des éléments clés pour les futures alimentations sur puce, compactes et présentant des performances améliorées: haut rendement et forte densité de puissance. L'objectif de ce travail de thèse est d'étudier les matériaux et la technologie pour réaliser de bobines à base de ferrite, intégrées sur silicium, avec des faibles empreintes (<4 mm ²) et de faible épaisseur (<250 µm). Ces bobines, dédiées à la conversion de puissance (˜ 1 W) doivent présenter une forte inductance spécifique et un facteur de qualité élevé dans la gamme de fréquence visée (5-10 MHz). Des ferrites de NiZn ont été sélectionnées comme matériaux magnétiques pour le noyau des bobines en raison de leur forte résistivité et de leur perméabilité stable dans la gamme de fréquence visée. Deux techniques sont développées pour les noyaux de ferrite: la sérigraphie d'une poudre synthétisée au laboratoire et la découpe automatique de films de ferrite commerciaux, suivi dans chaque cas du frittage et le placement sur les conducteurs pour former une bobine rectangulaire. Des bobines tests ont été réalisées dans un premier temps afin que la caractérisation puisse être effectuée : les propriétés magnétiques du noyau de ferrite notamment les pertes volumiques dans le noyau sont ainsi extraites. L'équation de Steinmetz a permis de corréler les courbes de pertes mesurées avec des expressions analytiques en fonction de la fréquence et de l'induction. La deuxième phase de la thèse est l'optimisation de la conception de la micro-bobine à base de ferrite, en tenant compte des pertes attendues. L'algorithme générique est utilisé pour optimiser les dimensions de la bobine avec pour objectif ; la minimisation des pertes et l'obtention de la valeur d'inductance spécifique souhaitée, sous faible polarisation en courant. La méthode des éléments finis pour le magnétisme FEMM est utilisée pour modéliser le comportement électromagnétique du composant. La deuxième série de prototypes a été réalisée afin de valider la méthode d'optimisation. En perspective, les procédés de photolithographie de résine épaisse et le dépôt électrolytique sont en cours de développement pour réaliser les enroulements de cuivre épais autour des noyaux de ferrite optimisés et ainsi former le composant complet.On-chip inductors are key passive elements for future power supplies on chip (PwrSoC), which are expected to be compact and show enhanced performance: high efficiency and high power density. The objective of this thesis work is to study the material and technology to realize small size (<4 mm²) and low profile (< 250 µm) ferrite-based on-chip inductor. This component is dedicated to low power conversion (˜ 1 W) and should provide high inductance density and high quality factor at medium frequency range (5-10 MHz). Fully sintered NiZn ferrites are selected as soft magnetic materials for the inductor core because of their high resistivity and moderate permeability stable in the frequencies range of interest. Two techniques are developed for the ferrite cores: screen printing of in-house made ferrite powder and cutting of commercial ferrite films, followed in each case by sintering and pick-and place assembling to form the rectangular toroid inductor. Test inductors were realized first so that the characterization could be carried out to study the magnetic properties of the ferrite core and the volumetric core losses. The core losses were fit from the measured curve with Steinmetz equation to obtain analytical expressions of losses versus frequency and induction. The second phase of the thesis is the design optimization for the on-chip ferrite based inductor, taking into account the expected losses. Genetic algorithm is employed to optimize the inductor design with the objective function as minimum losses and satisfying the specification on the inductance values under weak current-bias condition. Finite element method for magnetics FEMM is used as a tool to calculate inductance and losses. The second run of prototypes was done to validate the optimization method. In perspective, processes of thick-photoresist photolithography and electroplating are being developed to realize the completed thick copper windings surrounding ferrite cores