137 research outputs found

    Forward Analysis and Model Checking for Trace Bounded WSTS

    Full text link
    We investigate a subclass of well-structured transition systems (WSTS), the bounded---in the sense of Ginsburg and Spanier (Trans. AMS 1964)---complete deterministic ones, which we claim provide an adequate basis for the study of forward analyses as developed by Finkel and Goubault-Larrecq (Logic. Meth. Comput. Sci. 2012). Indeed, we prove that, unlike other conditions considered previously for the termination of forward analysis, boundedness is decidable. Boundedness turns out to be a valuable restriction for WSTS verification, as we show that it further allows to decide all ω\omega-regular properties on the set of infinite traces of the system

    On Termination for Faulty Channel Machines

    Get PDF
    A channel machine consists of a finite controller together with several fifo channels; the controller can read messages from the head of a channel and write messages to the tail of a channel. In this paper, we focus on channel machines with insertion errors, i.e., machines in whose channels messages can spontaneously appear. Such devices have been previously introduced in the study of Metric Temporal Logic. We consider the termination problem: are all the computations of a given insertion channel machine finite? We show that this problem has non-elementary, yet primitive recursive complexity

    Timed data flow diagrams

    Get PDF
    Traditional Data Flow Diagrams (DFD\u27s) are the cornerstone of the software development methodology known as Structured Analysis (SA), and they are probably the most widely used specification technique in industry today. DFD\u27s are popular because of their graphical representation and their hierarchical structure. Thus, they are well-suited for users with non-technical backgrounds and are commonly used to depict the static structure of information flow in a system. Numerous attempts to formalize DFD\u27s have appeared in the technical literature. We focus on the Formalized Data Flow Diagrams (FDFD\u27s) developed by Coleman, Wahls, Baker, and Leavens;This dissertation analyzes and extends FDFD\u27s with respect to their usefulness in specifying the qualitative and quantitative properties of real systems. Prior to this dissertation, there existed no well-founded knowledge about the computational power of FDFD\u27s nor any formal model in FDFD\u27s of the timing behavior of real systems;The dissertation is organized as a collection of five independent papers. Briefly, the main results of each paper are as follows: (i) Reduced FDFD\u27s are Turing equivalent. (ii) Stores, persistent flows, tests for empty flows, and infinite domains are not essential for FDFD\u27s. (iii) Subclasses of FDFD\u27s are equivalent to known subclasses of FIFO Petri Nets, immediately furnishing the decidability results for subclasses of FIFO Petri Nets to the corresponding subclasses of FDFD\u27s. (iv) A general stochastic model of time for FDFD\u27s (called Timed Data Flow Diagrams--TDFD\u27s) is defined, allowing not only a description of the relative likelihoods of various execution times, but also descriptions of the possible joint firing behavior of transitions. (v) An aggregation principle can be used for an efficient stochastic analysis of periodic TDFD\u27s with Markovian transition times;The results in this dissertation provide a firm theoretical foundation for further advances in Computer Science and Statistics, leading to practical and expressive tools for the specification and analysis of real systems

    Bounded Reachability Problems Are Decidable in FIFO Machines

    Get PDF
    The undecidability of basic decision problems for general FIFO machines such as reachability and unboundedness is well-known. In this paper, we provide an underapproximation for the general model by considering only runs that are input-bounded (i.e. the sequence of messages sent through a particular channel belongs to a given bounded language). We prove, by reducing this model to a counter machine with restricted zero tests, that the rational-reachability problem (and by extension, control-state reachability, unboundedness, deadlock, etc.) is decidable. This class of machines subsumes input-letter-bounded machines, flat machines, linear FIFO nets, and monogeneous machines, for which some of these problems were already shown to be decidable. These theoretical results can form the foundations to build a tool to verify general FIFO machines based on the analysis of input-bounded machines

    Reachability Analysis of Communicating Pushdown Systems

    Full text link
    The reachability analysis of recursive programs that communicate asynchronously over reliable FIFO channels calls for restrictions to ensure decidability. Our first result characterizes communication topologies with a decidable reachability problem restricted to eager runs (i.e., runs where messages are either received immediately after being sent, or never received). The problem is EXPTIME-complete in the decidable case. The second result is a doubly exponential time algorithm for bounded context analysis in this setting, together with a matching lower bound. Both results extend and improve previous work from La Torre et al

    General Decidability Results for Asynchronous Shared-Memory Programs: {H}igher-Order and Beyond

    Get PDF

    General Decidability Results for Asynchronous Shared-Memory Programs: Higher-Order and Beyond

    Full text link
    The model of asynchronous programming arises in many contexts, from low-level systems software to high-level web programming. We take a language-theoretic perspective and show general decidability and undecidability results for asynchronous programs that capture all known results as well as show decidability of new and important classes. As a main consequence, we show decidability of safety, termination and boundedness verification for higher-order asynchronous programs -- such as OCaml programs using Lwt -- and undecidability of liveness verification already for order-2 asynchronous programs. We show that under mild assumptions, surprisingly, safety and termination verification of asynchronous programs with handlers from a language class are decidable iff emptiness is decidable for the underlying language class. Moreover, we show that configuration reachability and liveness (fair termination) verification are equivalent, and decidability of these problems implies decidability of the well-known "equal-letters" problem on languages. Our results close the decidability frontier for asynchronous programs

    Sublinearly space bounded iterative arrays

    Get PDF
    Iterative arrays (IAs) are a, parallel computational model with a sequential processing of the input. They are one-dimensional arrays of interacting identical deterministic finite automata. In this note, realtime-lAs with sublinear space bounds are used to accept formal languages. The existence of a proper hierarchy of space complexity classes between logarithmic anel linear space bounds is proved. Furthermore, an optimal spacc lower bound for non-regular language recognition is shown. Key words: Iterative arrays, cellular automata, space bounded computations, decidability questions, formal languages, theory of computatio

    On the decidability and complexity of Metric Temporal Logic over finite words

    Full text link
    Metric Temporal Logic (MTL) is a prominent specification formalism for real-time systems. In this paper, we show that the satisfiability problem for MTL over finite timed words is decidable, with non-primitive recursive complexity. We also consider the model-checking problem for MTL: whether all words accepted by a given Alur-Dill timed automaton satisfy a given MTL formula. We show that this problem is decidable over finite words. Over infinite words, we show that model checking the safety fragment of MTL--which includes invariance and time-bounded response properties--is also decidable. These results are quite surprising in that they contradict various claims to the contrary that have appeared in the literature
    • …
    corecore