Modeling and Optimization Algorithm for SiC-based Three-phase Motor Drive System

More electric aircraft (MEA) and electrified aircraft propulsion (EAP) becomes the important topics in the area of transportation electrifications, expecting remarkable environmental and economic benefits. However, they bring the urgent challenges for the power electronics design since the new power architecture in the electrified aircraft requires many benchmark designs and comparisons. Also, a large number of power electronics converter designs with different specifications and system-level configurations need to be conducted in MEA and EAP, which demands huge design efforts and costs. Moreover, the long debugging and testing process increases the time to market because of gaps between the paper design and implementation. To address these issues, this dissertation covers the modeling and optimization algorithms for SiC-based three-phase motor drive systems in aviation applications. The improved models can help reduce the gaps between the paper design and implementation, and the implemented optimization algorithms can reduce the required execution time of the design program. The models related to magnetic core based inductors, geometry layouts, switching behaviors, device loss, and cooling design have been explored and improved, and several modeling techniques like analytical, numerical, and curve-fitting methods are applied. With the developed models, more physics characteristics of power electronics components are incorporated, and the design accuracy can be improved. To improve the design efficiency and to reduce the design time, optimization schemes for the filter design, device selection combined with cooling design, and system-level optimization are studied and implemented. For filter design, two optimization schemes including Ap based weight prediction and particle swarm optimization are adopted to reduce searching efforts. For device selection and related cooling design, a design iteration considering practical layouts and switching speed is proposed. For system-level optimization, the design algorithm enables the evaluation of different topologies, modulation schemes, switching frequencies, filter configurations, cooling methods, and paralleled converter structure. To reduce the execution time of system-level optimization, a switching function based simulation and waveform synthesis method are adopted. Furthermore, combined with the concept of design automation, software integrated with the developed models, optimization algorithms, and simulations is developed to enable visualization of the design configurations, database management, and design results

Integrating Abstraction Techniques for Formal Verification of Analog Designs

The verification of analog designs is a challenging and exhaustive task that requires deep understanding of physical behaviours. In this paper, we propose a qualitative based predicate abstraction method for the verification of a class of non-linear analog circuits. In the proposed method, system equations are automatically extracted from a circuit diagram by means of a bond graph. Verification is applied based on combining techniques from constraint solving and computer algebra along with symbolic model checking. Our methodology has the advantage of avoiding exhaustive simulation normally encountered in the verification of analog designs. To this end, we have used Dymola, Hsolver, SMV and Mathematica to implement the verification flow. We illustrate the methodology on several analog examples including Colpitts and tunnel diode oscillators

Potential and Challenges of Analog Reconfigurable Computation in Modern and Future CMOS

In this work, the feasibility of the floating-gate technology in analog computing platforms in a scaled down general-purpose CMOS technology is considered. When the technology is scaled down the performance of analog circuits tends to get worse because the process parameters are optimized for digital transistors and the scaling involves the reduction of supply voltages. Generally, the challenge in analog circuit design is that all salient design metrics such as power, area, bandwidth and accuracy are interrelated. Furthermore, poor flexibility, i.e. lack of reconfigurability, the reuse of IP etc., can be considered the most severe weakness of analog hardware. On this account, digital calibration schemes are often required for improved performance or yield enhancement, whereas high flexibility/reconfigurability can not be easily achieved. Here, it is discussed whether it is possible to work around these obstacles by using floating-gate transistors (FGTs), and analyze problems associated with the practical implementation. FGT technology is attractive because it is electrically programmable and also features a charge-based built-in non-volatile memory. Apart from being ideal for canceling the circuit non-idealities due to process variations, the FGTs can also be used as computational or adaptive elements in analog circuits. The nominal gate oxide thickness in the deep sub-micron (DSM) processes is too thin to support robust charge retention and consequently the FGT becomes leaky. In principle, non-leaky FGTs can be implemented in a scaled down process without any special masks by using “double”-oxide transistors intended for providing devices that operate with higher supply voltages than general purpose devices. However, in practice the technology scaling poses several challenges which are addressed in this thesis. To provide a sufficiently wide-ranging survey, six prototype chips with varying complexity were implemented in four different DSM process nodes and investigated from this perspective. The focus is on non-leaky FGTs, but the presented autozeroing floating-gate amplifier (AFGA) demonstrates that leaky FGTs may also find a use. The simplest test structures contain only a few transistors, whereas the most complex experimental chip is an implementation of a spiking neural network (SNN) which comprises thousands of active and passive devices. More precisely, it is a fully connected (256 FGT synapses) two-layer spiking neural network (SNN), where the adaptive properties of FGT are taken advantage of. A compact realization of Spike Timing Dependent Plasticity (STDP) within the SNN is one of the key contributions of this thesis. Finally, the considerations in this thesis extend beyond CMOS to emerging nanodevices. To this end, one promising emerging nanoscale circuit element - memristor - is reviewed and its applicability for analog processing is considered. Furthermore, it is discussed how the FGT technology can be used to prototype computation paradigms compatible with these emerging two-terminal nanoscale devices in a mature and widely available CMOS technology.Siirretty Doriast

Study of numeric Saturation Effects in Linear Digital Compensators

Saturation arithmetic is often used in finite precision digital compensators to circumvent instability due to radix overflow. The saturation limits in the digital structure lead to nonlinear behavior during large state transients. It is shown that if all recursive loops in a compensator are interrupted by at least one saturation limit, then there exists a bounded external scaling rule which assures against overflow at all nodes in the structure. Design methods are proposed based on the generalized second method of Lyapunov, which take the internal saturation limits into account to implement a robust dual-mode suboptimal control for bounded input plants. The saturating digital compensator provides linear regulation for small disturbances, and near-time-optimal control for large disturbances or changes in the operating point. Computer aided design tools are developed to facilitate the analysis and design of this class of digital compensators

Aerospace medicine and biology: A continuing bibliography with indexes, supplement 190, February 1979

This bibliography lists 235 reports, articles, and other documents introduced into the NASA scientific and technical information system in January 1979

Chalcogenide and metal-oxide memristive devices for advanced neuromorphic computing

Energy-intensive artificial intelligence (AI) is prevailing and changing the world, which requires energy-efficient computing technology. However, traditional AI driven by von Neumann computing systems suffers from the penalties of high-energy consumption and time delay due to frequent data shuttling. To tackle the issue, brain-inspired neuromorphic computing that performs data processing in memory is developed, reducing energy consumption and processing time. Particularly, some advanced neuromorphic systems perceive environmental variations and internalize sensory signals for localized in-senor computing. This methodology can further improve data processing efficiency and develop multifunctional AI products. Memristive devices are one of the promising candidates for neuromorphic systems due to their non-volatility, small size, fast speed, low-energy consumption, etc. In this thesis, memristive devices based on chalcogenide and metal-oxide materials are fabricated for neuromorphic computing systems. Firstly, a versatile memristive device (Ag/CuInSe2/Mo) is demonstrated based on filamentary switching. Non-volatile and volatile features are coexistent, which play multiple roles of non-volatile memory, selectors, artificial neurons, and artificial synapses. The conductive filaments’ lifetime was controlled to present both volatile and non-volatile behaviours. Secondly, the sensing functions (temperature and humidity) are explored based on Ag conductive filaments. An intelligent matter (Ag/Cu(In, Ga)Se2/Mo) endowing reconfigurable temperature and humidity sensations is developed for sensory neuromorphic systems. The device reversibly switches between two states with differentiable semiconductive and metallic features, demonstrating different responses to temperature and humidity variations. Integrated devices can be employed for intelligent electronic skin and in-sensor computing. Thirdly, the memristive-based sensing function of light was investigated. An optoelectronic synapse (ITO/ZnO/MoO3/Mo) enabling multi-spectrum sensitivity for machine vision systems is developed. For the first time, this optoelectronic synapse is practical for front-end retinomorphic image sensing, convolution processing, and back-end neuromorphic computing. This thesis will benefit the development of advanced neuromorphic systems pushing forward AI technology

Effect of water on electrical properties of Refined, Bleached, and Deodorized Palm Oil (RBDPO) as electrical insulating material

This paper describes the properties of refined, bleached, deodorized palm oil (RBDPO) as having the potential to be used as insulating liquid. There are several important properties such as electrical breakdown, dielectric dissipation factor, specific gravity, flash point, viscosity and pour point of RBDPO that was measured and compared to commercial mineral oil which is largely in current use as insulating liquid in power transformers. Experimental results of the electrical properties revealed that the average breakdown voltage of the RBDPO sample, without the addition of water at room temperature, is 13.368 kV. The result also revealed that due to effect of water, the breakdown voltage is lower than that of commercial mineral oil (Hyrax). However, the flash point and the pour point of RBDPO is very high compared to mineral oil thus giving it advantageous possibility to be used safely as insulating liquid. The results showed that RBDPO is greatly influenced by water, causing the breakdown voltage to decrease and the dissipation factor to increase; this is attributable to the high amounts of dissolved water