8,288 research outputs found
Sensitivity analysis of oscillator models in the space of phase-response curves: Oscillators as open systems
Oscillator models are central to the study of system properties such as
entrainment or synchronization. Due to their nonlinear nature, few
system-theoretic tools exist to analyze those models. The paper develops a
sensitivity analysis for phase-response curves, a fundamental one-dimensional
phase reduction of oscillator models. The proposed theoretical and numerical
analysis tools are illustrated on several system-theoretic questions and models
arising in the biology of cellular rhythms
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Variable domain transformation for linear PAC analysis of mixed-signal systems
This paper describes a method to perform linear AC analysis on mixed-signal systems which appear strongly nonlinear in the voltage domain but are linear in other variable domains. Common circuits like phase/delay-locked loops and duty-cycle correctors fall into this category, since they are designed to be linear with respect to phases, delays, and duty-cycles of the input and output clocks, respectively. The method uses variable domain translators to change the variables to which the AC perturbation is applied and from which the AC response is measured. By utilizing the efficient periodic AC (PAC) analysis available in commercial RF simulators, the circuit’s linear transfer function in the desired variable domain can be characterized without relying on extensive transient simulations. Furthermore, the variable domain translators enable the circuits to be macromodeled as weakly-nonlinear systems in the chosen domain and then converted to voltage-domain models, instead of being modeled as strongly-nonlinear systems directly
A general theory of phase noise in electrical oscillators
A general model is introduced which is capable of making accurate, quantitative predictions about the phase noise of different types of electrical oscillators by acknowledging the true periodically time-varying nature of all oscillators. This new approach also elucidates several previously unknown design criteria for reducing close-in phase noise by identifying the mechanisms by which intrinsic device noise and external noise sources contribute to the total phase noise. In particular, it explains the details of how 1/f noise in a device upconverts into close-in phase noise and identifies methods to suppress this upconversion. The theory also naturally accommodates cyclostationary noise sources, leading to additional important design insights. The model reduces to previously available phase noise models as special cases. Excellent agreement among theory, simulations, and measurements is observed
Review of polynomial chaos-based methods for uncertainty quantification in modern integrated circuits
Advances in manufacturing process technology are key ensembles for the production of integrated circuits in the sub-micrometer region. It is of paramount importance to assess the effects of tolerances in the manufacturing process on the performance of modern integrated circuits. The polynomial chaos expansion has emerged as a suitable alternative to standardMonte Carlo-based methods that are accurate, but computationally cumbersome. This paper provides an overview of the most recent developments and challenges in the application of polynomial chaos-based techniques for uncertainty quantification in integrated circuits, with particular focus on high-dimensional problems
SCEE 2008 book of abstracts : the 7th International Conference on Scientific Computing in Electrical Engineering (SCEE 2008), September 28 – October 3, 2008, Helsinki University of Technology, Espoo, Finland
This report contains abstracts of presentations given at the SCEE 2008 conference.reviewe
Model order reduction and sensitivity analysis
The electronics industry provides the core technology for numerous industrial innovations. Progress in the area of microelectronics is highlighted by several milestones in chip technology, for example microprocessors and memory chips. The ongoing increase in performance and memory density would not have been possible without the extensive use of computer simulation techniques, especially electronic circuit simulation. The basis of the latter is formed by a sound framework of methods from the area of numerical methods. In recent years, the demands on the capabilities of circuit simulation have become even more stringent. Circuit simulators have become the core of all simulations within the electronics industry. Crosstalk effects in interconnect structures are modeled by large extracted RLC networks. Also, substrate effects that start playing a crucial role in determining the performance are modeled by extracting, again, large resistive or RC networks. New algorithms are needed to cope with such situations that are extremely crucial for designers. The complexity caused by these parasitic extractions must be reduced to facilitate the simulation of the circuit while preserving accuracy. Fortunately, highly accurate parasitic extraction is not necessary for all parts of the design. Each layout contains critical blocks or paths whose timing and performance is crucial for the overall functionality of the chip. High precision interconnect modeling must be used for these circuit parts to verify the functionality of the design. On the other hand, there is interconnect outside of critical paths which adds to the complexity but whose exact model is not necessary and can be simplified. For the critical paths a so-called sensitivity analysis can bring a major achievement in speed-up, by automatically determining the critical parasitic elements that provide the most dominant influence. Another important aspect is the fact that there is an increasing deviation between design and manufacturing. Due to the ever decreasing feature sizes in modern chips, deviations from the intended dimensions are becoming more probable. Designers need to cope with this, and design the circuits in such a way that a deviation from intended dimensions does not alter the functionality of the circuit. In order to investigate this properly, one needs to assume that all components can possibly be slightly different after manufacturing.The effects this has on the performance of the circuit can be studied by introducing many thousands or even millions of parameters, describing the deviations, and performing a sensitivity analysis of the circuit w.r.t. parameter changes. The aforementioned problems form the inspiration for the study in this thesis. Sensitivity analysis is crucial for the correctness of virtual design environments based on electronic circuit simulators, and gives designers insight in how to alter the designs in order to guarantee more robustness with respect to variability in the design. The problem is that a thorough sensitivity analysis requires derivatives of the solution with respect to a large amount of parameters. This is not feasible using classical methods, being far too time-consuming for modern circuits. Recently proposed methods using the adjoint problem to calculate sensitivities are far more efficient, and these form the basis for our methodology. Our work has concentrated on making such methods even more efficient, by mixing them with concepts from the area of model order reduction. This leads to very efficient, robust and accurate methods for sensitivity analysis, even if the underlying circuit is large and the number of parameters is excessive
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