2,387 research outputs found

    Design Techniques for High Pin Efficiency Wireline Transceivers

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    While the majority of wireline research investigates bandwidth improvement and how to overcome the high channel loss, pin efficiency is also critical in high-performance wireline applications. This dissertation proposes two different implementations for high pin efficiency wireline transceivers. The first prototype achieves twice pin efficiency than unidirectional signaling, which is 32Gb/s simultaneous bidirectional transceiver supporting transmission and reception on the same channel at the same time. It includes an efficient low-swing voltage-mode driver with an R-gm hybrid for signal separation, combining the continuous-time-linear-equalizer (CTLE) and echo cancellation (EC) in a single stage, and employing a low-complexity 5/4X CDA system. Support of a wide range of channels is possible with foreground adaptation of the EC finite impulse response (FIR) filter taps with a sign-sign least-mean-square (SSLMS) algorithm. Fabricated in TSMC 28-nm CMOS, the 32Gb/s SBD transceiver occupies 0.09mm20.09 mm^{2} area and achieves 16Gb/s uni-directional and 32Gb/s simultaneous bi-directional signals. 32Gb/s SBD operation consumes 1.83mW/Gb/s with 10.8dB channel loss at Nyquist rate. The second prototype presents an optical transmitter with a quantum-dot (QD) microring laser. This can support wavelength-division multiplexing allowing for high pin efficiency application by packing multiple high-bandwidth signals onto one optical channel. The development QD microring laser model accurately captures the intrinsic photonic high-speed dynamics and allows for the future co-design of the circuits and photonic device. To achieve higher bandwidth than intrinsic one, utilizing both techniques of optical injection locking (OIL) and 2-tap asymmetric Feed-forward equalizer (FFE) can perform 22Gb/s operation with 3.2mW/Gb/s. The first hybrid-integration directly-modulated OIL QD microring laser system is demonstrated

    High-speed low-power modulator driver arrays for medium-reach optical networks

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    The internet is becoming the ubiquitous tool that is changing the lives of so many citizens across the world. Commerce, government, industry, healthcare and social interactions are all increasingly using internet applications to improve and facilitate communications. This is especially true for videoenabled applications, which currently demand much higher data rates and quality from data networks. High definition TV streaming services are emerging and these again will significantly push the demand for widely deployed, high-bandwidth services. The current access passive optical networks (PONs) use a single wavelength for downstream transmission and a separate one for upstream transmission. Incorporating wavelength-division multiplexing (WDM) in a PON allows for much higher bandwidths in both directions. While WDM technologies have been successfully deployed for many years in metro and core networks, in access networks they are not commonly used yet. This is mainly due to the high costs associated with deploying entire WDM access networks. However, the present optical networks cannot be simply and cost-effectively scaled to provide the capacity for tomorrow’s users. As an effect there is a strong need for new WDM access components which are compact, cost-competitive and mass-manufacturable. Increasing the number of wavelengths for WDM-PON automatically leads to an increase in the number of single pluggable transceivers, which brings substantial design challenges and additional costs. The multitude of TXs and RXs for different wavelength channels increases the total footprint considerably. Photonic integration of transceivers into arrays will significantly reduce the footprint and cost. However, the total power consumption of an array device is an issue. To avoid the use of a thermoelectric cooler, the integration density of components is severely limited by the heat dissipating capabilities offered by their package. As a result the WDM-PON philosophy necessitates the reduction of the transceiver’s power dissipation. From this plea it is apparent that the main technology challenges for realizing future-proof optical (access) networks are reducing active component power consumption, shrinking form factors and lowering assembly costs. In this perspective an over 100 Gb/s throughput component, composed of 10 channels at 11.3 Gb/s per wavelength channel would be a great contribution to the expansion of customer bandwidth. It can provide increased line rates to the end users at speeds of 10 Gb/s per wavelength. As RXs typically consume much less power than externally modulated TXs, they can relatively easily be integrated into an array. Mainly high speed optical transmitters have significant power consumptions and the heat generation caused by power dissipation forms a critical obstacle in the development of a 10-channel transmitter, which again underlines the importance of power reduction. Alongside the introduction of WDM in access networks, also inter-office point-to-point connections in data center environments could benefit from the WDM philosophy. As data center operators often suffer from fiber scarcity or do not own their fiber infrastructure, WDM technologies are essential to deliver reach and capacity extension for these scenarios. Interdata center communication also benefits from cost-, footprint- and energyefficient components operating at high speed to maximize the throughput. As an effect integrated over 100 Gb/s transceivers, such as 4 channels at 28 Gb/s, are highly desirable. The research described in this dissertation was partly funded by the European FP7 ICT project C3PO (Colourless and Coolerless Components for low Power Optical Networks) and the UGent special research fund. The C3PO project aimed to develop a new generation of green Si-photonic compatible components with record low power consumption, that can enable bandwidth growth and constrain the total cost. C3PO envisioned building high-capacity access networks employing reflective photonic components. To achieve this, cost-competitive reflective transmitters based on electroabsorption modulators (EAM) needed to be closely integrated into arrays. A multi-wavelength optical source provides the required wavelength channels for both downstream and upstream signals in the WDM-PON. Chapter 1 gives a short overview of a PON and describes the main implementations of a WDM-PON access network. It introduces integrated low power transmitter arrays for a cost-effective architecture of WDM-PONs and inter-data center communication. Chapter 2 compares different optical transmitters and gives a short overview of their most important characteristics. External modulation through both Mach-Zehnder modulators (MZMs) and EAMs is described. It shows that EAMs are the best choice for low power transmitter array integration, thanks to their lower drive voltage and smaller form factor, compared to MZMs. To achieve a reduced consumption, the electronic modulator driver topology is studied in chapter 3. The challenge in designing modulator drivers is the need to deliver very large currents in combination with high voltage swings. Four distinct output configurations are compared and techniques to reduce the power consumption of the drivers are described. Chapter 5 presents duobinary (DB), a modulation scheme that is gaining interest in today’s optical transmission. As the required bandwidth is about half that of NRZ, it softens the constraints on the transmitter bandwidth. Thanks to its narrow optical spectrum, it has an improved tolerance to dispersion in long haul single mode links and it can improve the spectral efficiency in WDM architectures. For optical DB a precoder is necessary to assure the received signal is equal to the original binary signal. The conducted research that resulted in this dissertation produced 2 low power EAM driver arrays: A 10-channel 113 Gb/s modulator driver array with state-of-the art ultra-low power consumption. A 2-channel 56 Gb/s duobinary driver array with a differential output with low power consumption. Both designs are elaborately analyzed in chapter 4 and 6 respectively. To the best of our knowledge the 10-channel EAM driver array is the first in its kind, while achieving the lowest power consumption for an EAM driver so far reported, 50% below the state of the art in power consumption. The 2-channel EAM driver array is the fastest modulator driver including on-chip duobinary encoding and precoding reported so far. The final chapter provides an overview of the foremost conclusions from the presented research. It is concluded with suggestions for further research

    High-Speed Low-Voltage Line Driver for SerDes Applications

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    The driving factor behind this research was to design & develop a line driver capable of meeting the demanding specifications of the next generation of SerDes devices. In this thesis various line driver topologies were analysed to identify a topology suited for a high-speed low-voltage operating environment. This thesis starts of by introducing a relatively new high-speed communication Device called SerDes. SerDes is used in wired chip-to-chip communications and operates by converting a parallel data stream in a serial data stream that can be then transmitted at a higher bit rate, existing SerDes devices operate up to 12.5Gbps. A matching SerDes device at the destination will then convert the serial data stream back into a parallel data stream to be read by the destination ASIC. SerDes typically uses a line driver with a differential output. Using a differential line driver increases the resilience to outside sources of noise and reduces the amount of EM radiation produced by transmission. The focus of this research is to design and develop a line driver that can operate at 40Gbps and can function with a power supply of less than IV. This demanding specification was decided to be an accurate representation of future requirements that a line driver in a SerDes device will have to conform to. A suitable line driver with a differential output was identified to meet the demanding specifications and was modified so that it can perfonn an equalisation technique called pre-distortion. Two variations of the new topology were outlined and a behavioural model was created for both using Matlab Simulink. The behavioural model for both variants proved the concept, however only one variant maintained its perfomance once the designs were implemented at transistor level in Cadence, using a 65nm CMOS technology provided by Texas Instruments. The final line driver design was then converted into a layout design, again using Cadence, and RC parasitics were extracted to perfom a post-layout simulation. The post layout simulation shows that the novel line driver can operate at 40Gbps with a power supply of 1 V - O.8V and has a power consumption of 4.54m W /Gbps. The Deterministic Jitter added by the line driver is 12.9ps

    Design of CMOS transimpedance amplifiers for remote antenna units in fiber-wireless systems.

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    La memoria de la tesis doctoral: Diseño de Amplificadores de Transimpedancia para Unidades de Antena Remota en Sistemas Fibra-Inalámbrico, se presenta en la modalidad de compendio de Publicaciones. A continuación, se expone un resumen del contexto, motivation y objetivos de la tesis.A lo largo de las últimas décadas, los avances tecnológicos y el esfuerzo por desarrollar nuevos sistemas de comunicaciones han crecido al ritmo que la demanda de información aumentaba a nivel mundial. Desde la aparición de Internet, el tráfico global de datos ha incrementado de forma exponencial y se han creado infinidad de aplicaciones y contenidos desde entonces.Con la llegada de la fibra óptica se produjo un avance muy significativo en el campo de las comunicaciones, ya que la fibra de vidrio y sus características fueron la clave para crear redes de largo alcance y alta velocidad. Por otro lado, los avances en las tecnologías de fabricación de circuitos integrados y de dispositivos fotónicos de alta velocidad han encabezado el desarrollo de los sistemas de comunicaciones ópticos, logrando incrementar la tasa de transmisión de datos hasta prácticamente alcanzar el ancho de banda de la fibra óptica.Para conseguir una mayor eficiencia en las comunicaciones y aumentar la tasa de transferencia, se necesitan métodos de modulación complejos que aprovechen mejor el ancho de banda disponible. No obstante, esta mayor complejidad de la modulación de los datos requiere sistemas con mejores prestaciones en cuanto a rango dinámico y linealidad. Estos esquemas de modulación se emplean desde hace tiempo en los sistemas de comunicaciones inalámbricos, donde el ancho de banda del canal, el aire, es extremadamente limitado y codiciado.Actualmente, los sistemas inalámbricos se enfrentan a una saturación del espectro que supone un límite a la tasa de transmisión de datos. Pese a los esfuerzos por extender el rango frecuencial a bandas superiores para aumentar el ancho de banda disponible, se espera un enorme aumento tanto en el número de dispositivos, como en la cantidad de datos demandados por usuario.Ante esta situación se han planteado distintas soluciones para superar estas limitaciones y mejorar las prestaciones de los sistemas actuales. Entre estas alternativas están los sistemas mixtos fibra-inalámbrico utilizando sistemas de antenas distribuidas (DAS). Estos sistemas prometen ser una solución económica y muy efectiva para mejorar la accesibilidad de los dispositivos inalámbricos, aumentando la cobertura y la tasa de transferencia de las redes a la vez que disminuyen las interferencias. El despliegue de los DAS tendrá un gran efecto en escenarios tales como edificios densamente poblados, hospitales, aeropuertos o edificios de oficinas, así como en áreas residenciales, donde un gran número de dispositivos requieren una cada vez mayor interconectividad.Dependiendo del modo de transmisión de los datos a través de la fibra, los sistemas mixtos fibra-inalámbrico se pueden categorizar de tres formas distintas: Banda base sobre fibra (BBoF), radiofrecuencia sobre fibra (RFoF) y frecuencia intermedia sobre fibra (IFoF). Actualmente, el esquema BBoF es el más utilizado para transmisiones de larga y media distancia. No obstante, utilizar este esquema en un DAS requiere unidades de antena remota (RAU) complejas y costosas, por lo que no está claro que esta configuración pueda ser viable en aplicaciones de bajo coste que requieran de un gran número de RAUs. Los sistemas RFoF e IFoF presentan esquemas más simples, sin necesidad de integrar un modulador/demodulador, puesto que la señal se procesa en una estación base y no en las propias RAUs.El desarrollo de esta tesis se enmarca en el estudio de los distintos esquemas de DAS. A lo largo de esta tesis se presentan varias propuestas de amplificadores de transimpedancia (TIA) adecuadas para su implementación en cada uno de los tres tipos de RAU existentes. La versatilidad y el amplio campo de aplicación de este circuito integrado, tanto en comunicaciones como en otros ámbitos, han motivado el estudio de la implementación de este bloque específico en las diferentes arquitecturas de RAU y en otros sistemas, tales como un receptor de televisión por cable (CATV) o una interfaz de un microsensor inercial capacitivo.La memoria de tesis se ha dividido en tres capítulos. El Capítulo 1 se ha empleado para introducir el concepto de los DAS, proporcionando el contexto y la motivación del diseño de las RAU, partiendo desde los principios básicos de operación de los dispositivos fotónicos y electrónicos y presentando las distintas arquitecturas de RAU. El Capítulo 2 supone el núcleo principal de la tesis. En este capítulo se presenta el estudio y diseño de los diferentes TIAs, que han sido optimizados respectivamente para cada una de las configuraciones de RAU, así como para otras aplicaciones. En un tercer capítulo se recogen los resultados más relevantes y se exponen las conclusiones de este trabajo.Tras llevar a cabo la descripción y comparación de las topologías existentes de TIA, se ha llegado a las siguientes conclusiones, las cuales nos llevan a elegir la topología shunt-feedback como la más adecuada para el diseño: - El compromiso entre ancho de banda, transimpedancia, consumo de potencia y ruido es menos restrictivo en los TIAs de lazo cerrado. - Los TIAs de lazo cerrado tienen un mayor número de grados de libertad para acometer su diseño. - Esta topología presenta una mejor linealidad gracias al lazo de realimentación. Si la respuesta frecuencial del núcleo del amplificador se ajusta de manera adecuada, el TIA shunt-feedback puede presentar una respuesta frecuencial plana y estable.En esta tesis, se ha propuesto una nueva técnica de reducción de ruido, aplicable en receptores ópticos con fotodiodos con un área activa grande (~1mm2). Esta estrategia, que se ha llamado la técnica del fotodiodo troceado, consiste en la fabricación del fotodiodo, no como una estructura única, sino como un array de N sub-fotodiodos, que ocuparían la misma área activa que el original. Las principales conclusiones tras hacer un estudio teórico y realizar un estudio de su aplicación en una de las topologías de TIA propuestas son: - El ruido equivalente a la entrada es menor cuanto mayor es el número de sub-fotodiodos, dado que la contribución al ruido que depende con el cuadrado de la frecuencia (f^2) decrece con una dependencia proporcional a N. - Con una aplicación simple de la técnica, replicando el amplificador de tensión del TIA N veces y utilizando N resistencias de realimentación, cada una con un valor N veces el original, la sensibilidad del receptor aumenta aproximadamente en un factor √N y la estabilidad del sistema no se ve afectada. - Al dividir el fotodiodo en N sub-fotodiodos, la capacidad parásita de cada uno de ellos es N veces menor a la original. Con esta nueva capacidad parásita, el diseño del TIA se puede optimizar, consiguiendo una sensibilidad mucho mejor que con un único fotodiodo para el mismo valor de consumo de potencia.Las principales conclusiones respecto a los diseños de los distintos TIAs para comunicaciones son las siguientes: TIA para BBoF: - El TIA propuesto, alcanza, con un consumo de tan solo 2.9 mW, un ancho de banda de 1 GHz y una sensibilidad de -11 dBm, superando las características de trabajos anteriores en condiciones similares (capacidad del fotodiodo, tecnología y tasa de transmisión). - La técnica del fotodiodo troceado se ha aplicado a este circuito, consiguiendo una mejora de hasta 7.9 dBm en la sensibilidad para un diseño optimizado de 16 sub-fotodiodos, demostrando, en una simulación a nivel de transistor, que la técnica propuesta funciona correctamente. TIA para RFoF: - El diseño propuesto logra una figura de mérito superior a la de trabajos previos, gracias a la combinación de su bajo consumo de potencia y su mayor transimpedancia. - Además, mientras que en la mayoría de trabajos previos no se integra un control de ganancia en el TIA, esta propuesta presenta una transimpedancia controlable desde 45 hasta 65 dBΩ. A través de un sistema de control simultáneo de la transimpedancia y de la ganancia en lazo abierto del amplificador de voltaje, se consigue garantizar una respuesta frecuencial plana y estable en todos los estados de transimpedancia, que le otorga al diseño una superior versatilidad y flexibilidad. TIA para CATV: - Se ha adaptado una versión del TIA para RFoF para demostrar la capacidad de adaptación de esta estructura en una implementación en un receptor CATV con un rango de control de transimpedancia de 18 dB. - Con la implementación del control de ganancia en el TIA, no es necesario el uso de un atenuador variable en el receptor, simplificando así el número de etapas del mismo. - Gracias al control de transimpedancia, el TIA logra rangos de entrada similares a los publicados en trabajos anteriores basados en una tecnología mucho menos accesible como GaAs PHEMT. TIA para IFoF Se ha fabricado un chip en una tecnología CMOS de 65 nm que opera a 1.2 V de tensión de alimentación y se ha realizado su caracterización eléctrica y óptica. - El TIA presenta una programabilidad de su transimpedancia con un control lineal en dB entre 60 y 76 dBΩ mediante un código termómetro de 4 bits. - El ancho de banda se mantiene casi constante en todo el rango de transimpedancia, entre 500 y 600 MHz.Como conclusión general tras comparar el funcionamiento de los TIAs para las distintas configuraciones de RAU, vale la pena mencionar que el TIA para IFoF consigue una figura de mérito muy superior a la de otros trabajos previos diseñados para RFoF. Esto se debe principalmente a la mayor transimpedancia y al muy bajo consumo de potencia del TIA para IFoF propuesto. Además, se consigue una mejor linealidad, ya que, para una transmisión de 54 Mb/s con el estándar 802.11a, se consigue un EVM menor de 2 % en un rango de entrada de 10 dB, comparado con los entre 3 y 5 dB reportados en trabajos previos. El esquema IFoF presenta un gran potencial y ventajas frente al RFoF, lo que lo coloca como una buena alternativa para disminuir los costes y mejorar el rendimiento de los sistemas de antenas distribuidas.Por último, cabe destacar que el diseño de TIA propuesto y fabricado para IFoF contribuye en gran medida al desarrollo y validación de una RAU completa. Se ha demostrado la capacidad de la estructura propuesta para alcanzar un bajo ruido, alta linealidad, simplicidad en la programabilidad de la transimpedancia y adaptabilidad de la topología para diferentes requisitos, lo cual es de un gran interés en el diseño de receptores ópticos.Por otra parte, una versión del TIA para su uso en una interfaz de sensores MEMS capacitivos se ha propuesto y estudiado. Consiste en un convertidor capacidad-voltaje basado en una versión del TIA para RFoF, con el objetivo de conseguir un menor ruido y proveer de una adaptabilidad para diferentes sensores capacitivos. Los resultados más significativos y las conclusiones de este diseño se resumen a continuación: - El TIA presenta un control de transimpedancia con un rango de 34 dB manteniendo el ancho de banda constante en 1.2 MHz. También presenta un control independiente del ancho de banda, desde 75 kHz hasta 1.2 MHz, manteniendo la transimpedancia fija en un valor máximo. - Con un consumo de potencia de tan solo 54 μW, el TIA alcanza una sensibilidad máxima de 1 mV/fF, que corresponde a una sensibilidad de 4.2 mV/g y presenta un ruido de entrada de tan solo 100 µg/√("Hz" ) a 50 kHz en la configuración de máxima transimpedancia.La principal conclusión que destaca de este diseño es su versatilidad y flexibilidad. El diseño propuesto permite adaptar fácilmente la respuesta de la interfaz a una amplia gama de dispositivos sensores, ya que se puede ajustar el ancho de banda para ajustarse a distintas frecuencias de operación, así como la transimpedancia puede ser modificada para conseguir distintas sensibilidades. Este doble control independiente de ancho de banda y transimpedancia le proporcionan una adaptabilidad completa al TIA.<br /

    Second IEEE/LEOS Benelux Chapter, November 26th, 1997, Eindhoven University of Technology, The Netherlands

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    Second IEEE/LEOS Benelux Chapter, November 26th, 1997, Eindhoven University of Technology, The Netherlands

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    High efficiency and high frequency resonant tunneling diode sources

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    Terahertz (THz) technology has been generating a lot of interest due to the numerous potential applications for systems working in this previously unexplored frequency range. THz radiation has unique properties suited for high capacity communication systems and non-invasive, non-ionizing properties that when coupled with a fairly good spatial resolution are unparalleled in its sensing capabilities for use in biomedical, industrial and security fields. However, in order to achieve this potential, effective and efficient ways of generating THz radiation are required. Devices which exhibit negative differential resistance (NDR) in their current-voltage (I – V) characteristics can be used for the generation of these radio frequency (RF) signals. Among them, the resonant tunnelling diode (RTD) is considered to be one of the most promising solid-state sources for millimeter and submillimeter wave radiation, which can operate at room temperature. However, the main limitations of RTD oscillators are producing high output power and increasing the DC-to-RF conversion efficiency. Although oscillation frequencies of up to 1.98 THz have been already reported, the output power is in the range of micro-Watts and conversion efficiencies are under 1 %. This thesis describes the systematic work done on the design, fabrication, and characterization of RTD-based oscillators in monolithic microwave/millimeter-wave integrated circuits (MMIC) that can produce high output power and have a high conversion efficiency at the same time. At the device level, parasitic oscillations caused by the biasing line inductance when the diode is biased in the NDR region prevents accurate characterization and compromises the maximum RF power output. In order to stabilise the NDR devices, a common method is the use of a suitable resistor connected across the device, to make the differential resistance in the NDR region positive. However, this approach severely hinders the diode’s performance in terms of DC-to-RF conversion efficiency. In this work, a new DC bias decoupling circuit topology has been developed to enable accurate, direct measurements of the device’s NDR characteristic and when implemented in an oscillator design provides over a 10-fold improvement in DC-to-RF conversion efficiency. The proposed method can be adapted for higher frequency and higher power devices and could have a major impact with regards to the adoption of RTD technology, especially for portable devices where power consumption must be taken into consideration. RF and DC characterization of the device were used in the realization on an accurate large-signal model of the RTD. S-parameter measurements were used to determine an accurate small-signal model for the device’s capacitance and inductance, while the extracted DC characteristics where used to replicate the I-V characteristics. The model is able to replicate the non-stable behavior of RTD devices when biased in the NDR region and the RF characteristics seen in oscillator circuits. It is expected that the developed model will serve in future optimization processes of RTD devices in millimeter and submillimeter wave applications. Finally, a wireless data transmission link operating in the Ka-band (26.5 GHz – – 40 GHz) using two RTDs operating as a transmitter and receiver is presented in this thesis. Wireless error-free data transfer of up to 2 gigabits per second (Gbit/s) was achieved at a transmission distance of 15 cm. In summary, this work makes important contributions to the accurate characterization, and modeling of RTDs and demonstrates the feasibility of this technology for use in future portable wireless communication systems and imaging setups

    Millimeter-Wave Super-Regenerative Receivers for Wireless Communication and Radar

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    Today’s world is becoming increasingly automated and interconnected with billions of smart devices coming online, leading to a steep rise in energy consumption from small microelectronics. This coincides with an urgent push to transform global energy production to green energies, causing disruptions and energy shortages, and making the case for efficient energy use ever more pressing. Two major areas where high growth is expected are the fields of wireless communication and radar sensors. Millimeter-wave frequency bands are planned for fifth-generation (5G) and sixth-generation (6G) cellular communication standards, as well as automotive frequency-modulated continuous wave (FMCW) radar systems for driving assistance and automation. Fast silicon-based technologies enable these advances by operating at high maximum frequencies, such as the silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technologies. However, even the fastest transistors suffer from low and energy expensive gains at millimeter-wave frequencies. Rather than incremental improvements in circuit efficiency using conventional approaches, a disruptive revolution for green microelectronics could be enabled by exploring the low-power benefits of the super-regenerative receiver for some applications. The super-regenerative receiver uses a regenerative oscillator circuit to increase the gain by positive feedback, through coupling energy from the output back into the input. Careful bias and control of the circuit enables a very large gain from a small number of transistors and a very low energy dissipation. Thus, the super-regenerative oscillator could be used to replace amplifier circuits in high data rate wireless communication systems, or as active reflectors to increase the range of FMCW radar systems, greatly reducing the power consumption. The work in this thesis presents fundamental scientific research into the topic of energy-efficient millimeter-wave super-regenerative receivers for use in civilian wireless communication and radar applications. This research work covers the theory, analysis, and simulations, all the way up to the proof of concept, hardware realization, and experimental characterization. Analysis and modeling of regenerative oscillator circuits is presented and used to improve the understanding of the circuit operation, as well as design goals according to the specific application needs. Integrated circuits are investigated and characterized as a proof of concept for a high data rate wireless communication system operating between 140–220 GHz, and an automotive radar system operating at 60 GHz. Amplitude and phase regeneration capabilities for complex modulation are investigated, and principles for spectrum characterization are derived. The circuits are designed and fabricated in a 130 nm SiGe HBT technology, combining bipolar and complementary metal-oxide semiconductor (BiCMOS) transistors. To prove the feasibility of the research concepts, the work achieves a wireless communication link at 16 Gbit/s over 20 cm distance with quadrature amplitude modulation (QAM), which is a world record for the highest data rate ever reported in super-regenerative circuits. This was powered by a super-regenerative oscillator circuit operating at 180 GHz and providing 58 dB of gain. Energy efficiency is also considerably high, drawing 8.8 mW of dc power consumption, which corresponds to a highly efficient 0.6 pJ/bit. Packaging and module integration innovations were implemented for the system experiments, and additional broadband circuits were investigated to generate custom quench waveforms to further enhance the data rate. For radar active reflectors, a regenerative gain of 80 dB is achieved at 60 GHz from a single circuit, which is the best in its frequency range, despite a low dc power consumption of 25 mW

    SILICON TERAHERTZ ELECTRONICS: CIRCUITS AND SYSTEMS FOR FUTURE APPLICATIONS

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    The terahertz frequency bands are gaining increasing attention these days for the potential applications in imaging, sensing, spectroscopy, and communication. These applications can be used in a wide range of fields, such as military, security, biomedical analysis, material science, astronomy, etc. Unfortunately, utilizing these frequency bands is very challenging due to the notorious ”terahertz gap”. Consequently, current terahertz systems are very bulky and expensive, sometimes even require cryogenic conditions. Silicon terahertz electronics now becomes very attractive, since it can achieve significantly lower cost and make portable consumer terahertz devices feasible. However, due to the limited device fmax and low breakdown voltage, signal generation and processing on silicon platform in this frequency range is challenging. This thesis aims to tackle these challenges and implement high-performance terahertz systems. First of all, the devices are investigated under the terahertz frequency range and optimum termination conditions for maximizing the efficacy of the devices is derived. Then, novel passive surrounding networks are designed to provide the devices with the optimal termination conditions to push the performances of the terahertz circuit blocks. Finally, the high-performance circuit blocks are used to build terahertz systems, and system-level innovations are also proposed to push the state of the art forward. In Chapter 2, using a device-centric bottom-up design method, a 210-GHz harmonic oscillator is designed. With the parasitic tuning mechanism, a wide frequency tuning range is achieved without using lossy varactors. A passive network based on the return-path gap coupler and self-feeding structure is also designed to provide optimal terminations for the active devices to maximize the harmonic power generation. Fabricated with a 0.13-um SiGe BiCMOS process, the oscillator is highly compact with a core size of only 290x95 um2. The output frequency can be tuned from 197.5 GHz to 219.7 GHz, which is around 10.6% compared to the center frequency. It also achieves a peak output power and dc-to-RF efficiency of 1.4 dBm and 2.4%, respectively. The measured output phase noise at 1 MHz offset is -87.5 dBc/Hz. The high power, wide tuning range, low phase noise, as well as compact size, make this oscillator very suitable for terahertz systems integration. In Chapter 3, the design of a 320-GHz fully-integrated terahertz imaging system is described. The system is composed of a phase-locked high-power transmitter and a coherent high-sensitivity subharmonic-mixing receiver, which are fabricated using a 0.13-um SiGe BiCMOS technology. To enhance the imaging sensitivity, a heterodyne coherent detection scheme is utilized. To obtain frequency coherency, fully-integrated phase-locked loops are implemented on both the transmitter and receiver chips. According to the measurement, consuming a total dc power of 605 mW, the transmitter chip achieves a peak radiated power of 2 mW and a peak EIRP of 21.1 dBm. The receiver chip achieves an equivalent incoherent responsivity of more than 7.26 MV/W and a sensitivity of 70.1 pW under an integration bandwidth of 1 kHz, with a total dc power consumption of 117 mW. The achieved sensitivity with this proposed coherent imaging transceiver is around ten times better compared with other state-of-the-art incoherent imagers. In Chapter 4, a spatial-orthogonal ASK transmitter architecture for high-speed terahertz wireless communication is presented. The self-sustaining oscillator-based transmitter architecture has an ultra-compact size and excellent power efficiency. With the proposed high-speed constant-load switch, significantly reduced modulation loss is achieved. Using polarization diversity and multi-level modulation, the throughput is largely enhanced. Array configuration is also adopted to enhance the link budget for higher signal quality and longer communication range. Fabricated in a 0.13-um SiGe BiCMOS technology, the 220-GHz transmitter prototype achieves an EIRP of 21 dBm and dc-to- THz-radiation efficiency of 0.7% in each spatial channel. A 24.4-Gb/s total data rate over a 10-cm communication range is demonstrated. With an external Teflon lens system, the demonstrated communication range is further extended to 52 cm. Compared with prior art, this prototype demonstrates much higher transmitter efficiency. In Chapter 5, an entirely-on-chip frequency-stabilization feedback mechanism is proposed, which avoids the use of both frequency dividers and off-chip references, achieving much lower system integration cost and power consumption. Using this mechanism, a 301.7-to-331.8-GHz source prototype is designed in a 0.13-um SiGe BiCMOS technology. According to the measurement, the source consumes a dc power of only 51.7 mW. The output phase noise is -71.1 and -75.2 dBc/Hz at 100 kHz and 1 MHz offset, respectively. A -13.9-dBm probed output power is also achieved. Overall, the prototype source demonstrates the largest output frequency range and lowest power consumption while achieving comparable phase noise and output power performances with respect to the state of the art. All the designs demonstrated in this thesis achieve good performances and push the state of the art forward, paving the way for implementation of more sophisticated terahertz circuits and systems for future applications
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