Low-power, 10-Gbps 1.5-Vpp differential CMOS driver for a silicon electro-optic ring modulator

We present a novel driver circuit enabling electro-optic modulation with high extinction ratio from a co-designed silicon ring modulator. The driver circuit provides an asymmetric differential output at 10Gbps with a voltage swing up to 1.5V(pp) from a single 1.0V supply, maximizing the resonance-wavelength shift of depletion-type ring modulators while avoiding carrier injection. A test chip containing 4 reconfigurable driver circuits was fabricated in 40nm CMOS technology. The measured energy consumption for driving a 100fF capacitive load at 10Gbps was as low as 125fJ/bit and 220fJ/bit at 1V(pp) and 1.5V(pp) respectively. After flip-chip integration with ring modulators on a silicon-photonics chip, the power consumption was measured to be 210fJ/bit and 350fJ/bit respectively

Development of a broadband and squint-free Ku-band phased array antenna system for airborne satellite communications

Novel avionic communication systems are required for various purposes, for example to increase the flight safety and operational integrity as well as to enhance the quality of service to passengers on board. To serve these purposes, a key technology that is essential to be developed is an antenna system that can provide broadband connectivity within aircraft cabins at an affordable price. Currently, in the European Commission (EC) 7th Framework Programme SANDRA project (SANDRA, 2011), a development of such an antenna system is being carried out. The system is an electronically-steered phased-array antenna (PAA) with a low aerodynamic profile. The reception of digital video broadcasting by satellite (DVB-S) signal which is in the frequency range of 10.7-12.75 GHz (Ku-band) is being considered. In order to ensure the quality of service provided to the passengers, the developed antenna should be able to receive the entire DVB-S band at once while complying with the requirements of the DVB-S system (Morello & Mignone, 2006). These requirements, as will be explained later, dictate a broadband antenna system where the beam is squint-free, i.e. no variation of beam pointing direction for all the frequencies in the desired band. Additionally, to track the satellite, the seamless tunability of the beam pointing direction of this antenna is also required. In this work, a concept of optical beamforming (Riza & Thompson, 1997) is implemented to provide a squint-free beam over the entire Ku-band for all the desired pointing directions. The optical beamformer itself consists of continuously tunable optical delay lines that enable seamless tunability of the beam pointing direction

Integrated GHz silicon photonic interconnect with micrometer-scale modulators and detectors

We report an optical link on silicon using micrometer-scale ring-resonator enhanced silicon modulators and waveguide-integrated germanium photodetectors. We show 3 Gbps operation of the link with 0.5 V modulator voltage swing and 1.0 V detector bias. The total energy consumption for such a link is estimated to be ~120 fJ/bit. Such compact and low power monolithic link is an essential step towards large-scale on-chip optical interconnects for future microprocessors

Column-row addressing of thermo-optic phase shifters for controlling large silicon photonic circuits

We demonstrate a time-multiplexed row-column addressing scheme to drive thermo-optic phase shifters in a silicon photonic circuit. By integrating a diode in series with the heater, we can connect $N \times M$ heaters in an matrix topology to $N$ row and $M$ column lines. The heaters are digitally driven with pulse-width modulation, and time-multiplexed over different channels. This makes it possible to drive the circuit without digital-to-analog converters, and using only $M+N$ wires. We demonstrate this concept with a $1 \times 16$ power splitter tree with 15 thermo-optic phase shifters that are controlled in a $3 \times 5$ matrix, connected through 8 bond pads. This technique is especially useful in silicon photonic circuits with many tuners but limited space for electrical connections

Grating couplers with an integrated power splitter for high-intensity optical power distribution

In this letter, we present a fiber grating coupler with an integrated 16-way power splitter. The incoming light from the fiber is split immediately over 16 channels, and therefore, the total optical power is never confined in a single waveguide. This is of particular interest for silicon photonics platforms, because, here, high optical intensities can cause significant non-linear losses. The device has a total coupling efficiency that is similar to standard focusing grating couplers. Furthermore, a channel non-uniformity below 1.1 dB has been obtained. By studying the alignment sensitivity, we found that for high splitting uniformity, a careful positioning of the fiber is necessary. We also experimentally demonstrate that this device is indeed capable of handling high optical powers without introducing additional non-linear losses

Principles of Neuromorphic Photonics

In an age overrun with information, the ability to process reams of data has become crucial. The demand for data will continue to grow as smart gadgets multiply and become increasingly integrated into our daily lives. Next-generation industries in artificial intelligence services and high-performance computing are so far supported by microelectronic platforms. These data-intensive enterprises rely on continual improvements in hardware. Their prospects are running up against a stark reality: conventional one-size-fits-all solutions offered by digital electronics can no longer satisfy this need, as Moore's law (exponential hardware scaling), interconnection density, and the von Neumann architecture reach their limits. With its superior speed and reconfigurability, analog photonics can provide some relief to these problems; however, complex applications of analog photonics have remained largely unexplored due to the absence of a robust photonic integration industry. Recently, the landscape for commercially-manufacturable photonic chips has been changing rapidly and now promises to achieve economies of scale previously enjoyed solely by microelectronics. The scientific community has set out to build bridges between the domains of photonic device physics and neural networks, giving rise to the field of \emph{neuromorphic photonics}. This article reviews the recent progress in integrated neuromorphic photonics. We provide an overview of neuromorphic computing, discuss the associated technology (microelectronic and photonic) platforms and compare their metric performance. We discuss photonic neural network approaches and challenges for integrated neuromorphic photonic processors while providing an in-depth description of photonic neurons and a candidate interconnection architecture. We conclude with a future outlook of neuro-inspired photonic processing.Comment: 28 pages, 19 figure

A low-energy rate-adaptive bit-interleaved passive optical network

Energy consumption of customer premises equipment (CPE) has become a serious issue in the new generations of time-division multiplexing passive optical networks, which operate at 10 Gb/s or higher. It is becoming a major factor in global network energy consumption, and it poses problems during emergencies when CPE is battery-operated. In this paper, a low-energy passive optical network (PON) that uses a novel bit-interleaving downstream protocol is proposed. The details about the network architecture, protocol, and the key enabling implementation aspects, including dynamic traffic interleaving, rate-adaptive descrambling of decimated traffic, and the design and implementation of a downsampling clock and data recovery circuit, are described. The proposed concept is shown to reduce the energy consumption for protocol processing by a factor of 30. A detailed analysis of the energy consumption in the CPE shows that the interleaving protocol reduces the total energy consumption of the CPE significantly in comparison to the standard 10 Gb/s PON CPE. Experimental results obtained from measurements on the implemented CPE prototype confirm that the CPE consumes significantly less energy than the standard 10 Gb/s PON CPE