A compact high-energy particle detector for low-cost deep space missions

Over the last few decades particle physics has led to many new discoveries, laying the foundation for modern science. However, there are still many unanswered questions which the next generation of particle detectors could address, potentially expanding our knowledge and understanding of the Universe. Owing to recent technological advancements, electronic sensors are now able to acquire measurements previously unobtainable, creating opportunities for new deep-space high-energy particle missions. Consequently, a new compact instrument was developed capable of detecting gamma rays, neutrons and charged particles. This instrument combines the latest in FPGA System-on-Chip technology as the central processor and a 3x3 array of silicon photomultipliers coupled with an organic plastic scintillator as the detector. Using modern digital pulse shape discrimination and signal processing techniques, the scintillator and photomultiplier combination has been shown to accurately discriminate between the di_erent particle types and provide information such as total energy and incident direction. The instrument demonstrated the ability to capture 30,000 particle events per second across 9 channels - around 15 times that of the U.S. based CLAS detector. Furthermore, the input signals are simultaneously sampled at a maximum rate of 5 GSPS across all channels with 14-bit resolution. Future developments will include FPGA-implemented digital signal processing as well as hardware design for small satellite based deep-space missions that can overcome radiation vulnerability

Design and Implementation of Internal Model Based Controllers for DC/ AC Power Converters

The aim of this thesis is to design and implement an advanced control system for a working three-phase DC to AC power converter. Compared to' the traditional PI controller used widely in industry, the new voltage controller can track the reference voltage with improved accuracy and efficiency in the presence of different kind of local loads, and also works well in the single phase voltage control. This voltage controller is combined with a power controller to yield a complete controller. An important aspect of this work is the hardware implementation of the whole system. Main parts ofthis thesis are: ???????? 1. Review ofH-infinity and repetitive control techniques and their applications in power converters. 2. Design of a new voltage controller to eliminate the DC component in the output voltages, and taking into account the practical issues such as the processing delay due to the digital signal processor (DSP) implementation. 3. Modelling and simulation of the converter system incorporating different control techniques and with different kinds of loads. 4. Hardware implementation and the two-processor controller. The parallel communication between the DSPs. 5. The main problems encountered in???????????????????? hardware implementation and programming. The software used to initialize DSPs, implement the discretetime voltage controller and other functions such ~ generations of space vector pulse width modulation (SVPWM) signals, circuit protections, analog to digital (AD) cOl)versions, data transmission, etc. 6. Experimental results the under circumstances of no load connected to the converter, pure three-phase resistive loads, three-phase unbalanced resistive' loads and the series resistor-inductor loads. /Imperial Users onl

Deep Space Network information system architecture study

The purpose of this article is to describe an architecture for the Deep Space Network (DSN) information system in the years 2000-2010 and to provide guidelines for its evolution during the 1990s. The study scope is defined to be from the front-end areas at the antennas to the end users (spacecraft teams, principal investigators, archival storage systems, and non-NASA partners). The architectural vision provides guidance for major DSN implementation efforts during the next decade. A strong motivation for the study is an expected dramatic improvement in information-systems technologies, such as the following: computer processing, automation technology (including knowledge-based systems), networking and data transport, software and hardware engineering, and human-interface technology. The proposed Ground Information System has the following major features: unified architecture from the front-end area to the end user; open-systems standards to achieve interoperability; DSN production of level 0 data; delivery of level 0 data from the Deep Space Communications Complex, if desired; dedicated telemetry processors for each receiver; security against unauthorized access and errors; and highly automated monitor and control

TriG - A GNSS Precise Orbit and Radio Occultation Space Receiver

The GPS radio occultation (RO) technique [1] produces measurements in the ionosphere and neutral atmosphere [2] that contribute to monitoring space weather and climate change; and improving operational weather prediction. The high accuracy of RO soundings, traceable to SI standards, makes them ideal climate benchmark observations. For weather applications, RO observations improve the accuracy of weather forecasts by providing temperature and moisture profiles of sub-km vertical resolution, over land and ocean and in the presence of clouds. JPL is currently flying a handful of RO instruments [3] on various satellites in Low Earth Orbit (LEO). Although these receivers have served to pioneer occultation measurements, various advances in technology and understanding of the RO technique along with availability of new signals from GPS and other GNSS satellites allow us to design an improved next generation space-based Precise Orbit Determination (POD) and RO receiver, the TriG receiver. The paper describes the architecture and implementation of the JPL TriG receiver as well as results obtained with a prototype receiver demonstrating key technologies necessary for a next-generation space science receiver

Baseband analog front-end and digital back-end for reconfigurable multi-standard terminals

Multimedia applications are driving wireless network operators to add high-speed data services such as Edge (E-GPRS), WCDMA (UMTS) and WLAN (IEEE 802.11a,b,g) to the existing GSM network. This creates the need for multi-mode cellular handsets that support a wide range of communication standards, each with a different RF frequency, signal bandwidth, modulation scheme etc. This in turn generates several design challenges for the analog and digital building blocks of the physical layer. In addition to the above-mentioned protocols, mobile devices often include Bluetooth, GPS, FM-radio and TV services that can work concurrently with data and voice communication. Multi-mode, multi-band, and multi-standard mobile terminals must satisfy all these different requirements. Sharing and/or switching transceiver building blocks in these handsets is mandatory in order to extend battery life and/or reduce cost. Only adaptive circuits that are able to reconfigure themselves within the handover time can meet the design requirements of a single receiver or transmitter covering all the different standards while ensuring seamless inter-interoperability. This paper presents analog and digital base-band circuits that are able to support GSM (with Edge), WCDMA (UMTS), WLAN and Bluetooth using reconfigurable building blocks. The blocks can trade off power consumption for performance on the fly, depending on the standard to be supported and the required QoS (Quality of Service) leve

Development and implementation of an adaptive digital beamforming network for satellite communication systems

The use of adaptive digital beamforming techniques has, until recently, been largely restricted to high performance military radar systems. Recent advances in digital technology, however, have enabled the design of single chip digital beamforming networks. This, coupled with advances in digital signal processor technology, enables complete beamforming systems to be constructed at a lower cost, thus making the application of these techniques to commercial communications systems attractive. The design and development of such an adaptative digital beamforming network are described. The system is being developed as a proof of concept laboratory based demonstrator to enable the feasibility of adaptive digital beamforming techniques for communication systems to be determined. Ultimately, digital beamforming could be used in conjunction with large array antennas for communication satellite systems. This will enable the simultaneous steering of high gain antenna beams in the direction of gr...Peer ReviewedPostprint (published version

High accuracy computation with linear analog optical systems: a critical study

High accuracy optical processors based on the algorithm of digital multiplication by analog convolution (DMAC) are studied for ultimate performance limitations. Variations of optical processors that perform high accuracy vector-vector inner products are studied in abstract and with specific examples. It is concluded that the use of linear analog optical processors in performing digital computations with DMAC leads to impractical requirements for the accuracy of analog optical systems and the complexity of postprocessing electronics