1,269 research outputs found

    Neuro-memristive Circuits for Edge Computing: A review

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    The volume, veracity, variability, and velocity of data produced from the ever-increasing network of sensors connected to Internet pose challenges for power management, scalability, and sustainability of cloud computing infrastructure. Increasing the data processing capability of edge computing devices at lower power requirements can reduce several overheads for cloud computing solutions. This paper provides the review of neuromorphic CMOS-memristive architectures that can be integrated into edge computing devices. We discuss why the neuromorphic architectures are useful for edge devices and show the advantages, drawbacks and open problems in the field of neuro-memristive circuits for edge computing

    Low-Power Energy Efficient Circuit Techniques for Small IoT Systems

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    Although the improvement in circuit speed has been limited in recent years, there has been increased focus on the internet of things (IoT) as technology scaling has decreased circuit size, power usage and cost. This trend has led to the development of many small sensor systems with affordable costs and diverse functions, offering people convenient connection with and control over their surroundings. This dissertation discusses the major challenges and their solutions in realizing small IoT systems, focusing on non-digital blocks, such as power converters and analog sensing blocks, which have difficulty in following the traditional scaling trends of digital circuits. To accommodate the limited energy storage and harvesting capacity of small IoT systems, this dissertation presents an energy harvester and voltage regulators with low quiescent power and good efficiency in ultra-low power ranges. Switched-capacitor-based converters with wide-range energy-efficient voltage-controlled oscillators assisted by power-efficient self-oscillating voltage doublers and new cascaded converter topologies for more conversion ratio configurability achieve efficient power conversion down to several nanowatts. To further improve the power efficiency of these systems, analog circuits essential to most wireless IoT systems are also discussed and improved. A capacitance-to-digital sensor interface and a clocked comparator design are improved by their digital-like implementation and operation in phase and frequency domain. Thanks to the removal of large passive elements and complex analog blocks, both designs achieve excellent area reduction while maintaining state-of-art energy efficiencies. Finally, a technique for removing dynamic voltage and temperature variations is presented as smaller circuits in advanced technologies are more vulnerable to these variations. A 2-D simultaneous feedback control using an on-chip oven control locks the supply voltage and temperature of a small on-chip domain and protects circuits in this locked domain from external voltage and temperature changes, demonstrating 0.0066 V/V and 0.013 °C/°C sensitivities to external changes. Simple digital implementation of the sensors and most parts of the control loops allows robust operation within wide voltage and temperature ranges.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/138743/1/wanyeong_1.pd

    All-Standard-Cell-Based Analog-to-Digital Architectures Well-Suited for Internet of Things Applications

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    SMART-E-PTDC/CTM-PAM/04012/2022, IDS-PAPER-PTDC/CTM-PAM/4241/2020 and PEST (CTS/UNINOVA)-UIDB/00066/2020. This work also received funding from the European Community’s H2020 program [Grant Agreement No. 716510 (ERC-2016-StG TREND) and 952169 (SYNERGY, H2020-WIDESPREAD-2020-5, CSA)]. Publisher Copyright: © 2022 by the authors.In this paper, the most suited analog-to-digital (A/D) converters (ADCs) for Internet of Things (IoT) applications are compared in terms of complexity, dynamic performance, and energy efficiency. Among them, an innovative hybrid topology, a digital–delta (Δ) modulator (ΔM) ADC employing noise shaping (NS), is proposed. To implement the active building blocks, several standard-cell-based synthesizable comparators and amplifiers are examined and compared in terms of their key performance parameters. The simulation results of a fully synthesizable Digital-ΔM with NS using passive and standard-cell-based circuitry show a peak of 72.5 dB in the signal-to-noise and distortion ratio (SNDR) for a 113 kHz input signal and 1 MHz bandwidth (BW). The estimated (Formula presented.) is close to 16.2 fJ/conv.-step.publishersversionpublishe

    Power Management ICs for Internet of Things, Energy Harvesting and Biomedical Devices

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    This dissertation focuses on the power management unit (PMU) and integrated circuits (ICs) for the internet of things (IoT), energy harvesting and biomedical devices. Three monolithic power harvesting methods are studied for different challenges of smart nodes of IoT networks. Firstly, we propose that an impedance tuning approach is implemented with a capacitor value modulation to eliminate the quiescent power consumption. Secondly, we develop a hill-climbing MPPT mechanism that reuses and processes the information of the hysteresis controller in the time-domain and is free of power hungry analog circuits. Furthermore, the typical power-performance tradeoff of the hysteresis controller is solved by a self-triggered one-shot mechanism. Thus, the output regulation achieves high-performance and yet low-power operations as low as 12 µW. Thirdly, we introduce a reconfigurable charge pump to provide the hybrid conversion ratios (CRs) as 1⅓× up to 8× for minimizing the charge redistribution loss. The reconfigurable feature also dynamically tunes to maximum power point tracking (MPPT) with the frequency modulation, resulting in a two-dimensional MPPT. Therefore, the voltage conversion efficiency (VCE) and the power conversion efficiency (PCE) are enhanced and flattened across a wide harvesting range as 0.45 to 3 V. In a conclusion, we successfully develop an energy harvesting method for the IoT smart nodes with lower cost, smaller size, higher conversion efficiency, and better applicability. For the biomedical devices, this dissertation presents a novel cost-effective automatic resonance tracking method with maximum power transfer (MPT) for piezoelectric transducers (PT). The proposed tracking method is based on a band-pass filter (BPF) oscillator, exploiting the PT’s intrinsic resonance point through a sensing bridge. It guarantees automatic resonance tracking and maximum electrical power converted into mechanical motion regardless of process variations and environmental interferences. Thus, the proposed BPF oscillator-based scheme was designed for an ultrasonic vessel sealing and dissecting (UVSD) system. The sealing and dissecting functions were verified experimentally in chicken tissue and glycerin. Furthermore, a combined sensing scheme circuit allows multiple surgical tissue debulking, vessel sealer and dissector (VSD) technologies to operate from the same sensing scheme board. Its advantage is that a single driver controller could be used for both systems simplifying the complexity and design cost. In a conclusion, we successfully develop an ultrasonic scalpel to replace the other electrosurgical counterparts and the conventional scalpels with lower cost and better functionality

    Low-Noise Energy-Efficient Sensor Interface Circuits

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    Today, the Internet of Things (IoT) refers to a concept of connecting any devices on network where environmental data around us is collected by sensors and shared across platforms. The IoT devices often have small form factors and limited battery capacity; they call for low-power, low-noise sensor interface circuits to achieve high resolution and long battery life. This dissertation focuses on CMOS sensor interface circuit techniques for a MEMS capacitive pressure sensor, thermopile array, and capacitive microphone. Ambient pressure is measured in the form of capacitance. This work propose two capacitance-to-digital converters (CDC): a dual-slope CDC employs an energy efficient charge subtraction and dual comparator scheme; an incremental zoom-in CDC largely reduces oversampling ratio by using 9b zoom-in SAR, significantly improving conversion energy. An infrared gesture recognition system-on-chip is then proposed. A hand emits infrared radiation, and it forms an image on a thermopile array. The signal is amplified by a low-noise instrumentation chopper amplifier, filtered by a low-power 30Hz LPF to remove out-band noise including the chopper frequency and its harmonics, and digitized by an ADC. Finally, a motion history image based DSP analyzes the waveform to detect specific hand gestures. Lastly, a microphone preamplifier represents one key challenge in enabling voice interfaces, which are expected to play a dominant role in future IoT devices. A newly proposed switched-bias preamplifier uses switched-MOSFET to reduce 1/f noise inherently.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137061/1/chaseoh_1.pd

    Design of an Ultra Low Power RFCMOS Transceiver for a Self-Powered IoT Node

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    In this thesis a transceiver characterized to consume ultra low power based in RFCMOS for a self-powered Internet of Things node is studied and designed. The transceiver consists in a simple Non-Coherent system, which means that the signal is picked up by the receiver based on energy detection, as a result it is one of the simplest existing transceivers once it does not need in the transmitter a complex pulse generator and certainly in the receiver as well. It is composed by an OOK modulator, a pulse generator that will determine the centre frequency and a driver amplifier connected to a 50W antenna for the transmitter. While in the receiver there is as first block a Low Noise Amplifier, a self-mixer that will prepare the signal for the integrator and a comparator working as a energy detector. The UWB transceiver will be able to operate with a centre frequency of 4.5 GHz and a bandwidth of at least 500 MHz. It is critical to notice that the system is consuming a value of 96 mW for the power and accomplishing the power spectrum density -43 dBm/MHz using an OOK modulation technique. The entire system was implemented with standard 130nm CMOS technology
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