DeSyRe: on-Demand System Reliability

The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect and fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints

Self-Test Mechanisms for Automotive Multi-Processor System-on-Chips

L'abstract è presente nell'allegato / the abstract is in the attachmen

Security of Electrical, Optical and Wireless On-Chip Interconnects: A Survey

The advancement of manufacturing technologies has enabled the integration of more intellectual property (IP) cores on the same system-on-chip (SoC). Scalable and high throughput on-chip communication architecture has become a vital component in today's SoCs. Diverse technologies such as electrical, wireless, optical, and hybrid are available for on-chip communication with different architectures supporting them. Security of the on-chip communication is crucial because exploiting any vulnerability would be a goldmine for an attacker. In this survey, we provide a comprehensive review of threat models, attacks, and countermeasures over diverse on-chip communication technologies as well as sophisticated architectures.Comment: 41 pages, 24 figures, 4 table

Implementation of Bus-Based and NoC-Based MP3 Decoders on FPGA

The trend of modern System-on-Chip (SoC) design is increasing in size and number of Processing Elements (PE) for various and general purpose tasks. Emergence of Field Programmable Gate Array (FPGA) into the world of technology has lowered the limitations faced by Application Specific Integrated Circuit (ASIC) design. FPGA has a less timeto- market and is a perfect candidate for prototyping purposes due to the flexibility they create for the design and this is the key feature of the FPGA technology. Technology advancements have introduced reconfiguration concepts which increase the flexibility of FPGA designs more. One method to improve SoC's performance is to adopt a sophi sticated communication medium between PEs to achieve a high throughput. Bus architecture has been improved to meet the requirements of high-performance SoCs, however, its inherently poor scalability limjts their enhancement. The Network-on-Chip (NoC) design paradigm has emerged to overcome the scalability limitations of point-to-point and bus communkation. This thesis presents an investigation towards NoC versus bus based implementation of an SoC. An MP3 decoder has been selected as an application to be implemented on the proposed design. The final design in the thes is demonstrated that the NoC based MP3 decoder achieves a 14% faster clock frequency and real time operation with the NoC based design decode an MP3 frame on average in 10% less time that the bus based MP3 decoder

Smart battery pack for electric vehicles based on active balancing with wireless communication feedback

In this paper, the concept of smart battery pack is introduced. The smart battery pack is based on wireless feedback from individual battery cells and is capable to be applied to electric vehicle applications. The proposed solution increases the usable capacity and prolongs the life cycle of the batteries by directly integrating the battery management system in the battery pack. The battery cells are connected through half-bridge chopper circuits, which allow either the insertion or the bypass of a single cell depending on the current states of charge. This consequently leads to the balancing of the whole pack during both the typical charging and discharging time of an electric vehicle and enables the fault-tolerant operation of the pack. A wireless feedback for implementing the balancing method is proposed. This solution reduces the need for cabling and simplifies the assembling of the battery pack, making also possible a direct off-board diagnosis. The paper validates the proposed smart battery pack and the wireless feedback through simulations and experimental results by adopting a battery cell emulator

Impact of different time series aggregation methods on optimal energy system design

Modelling renewable energy systems is a computationally-demanding task due to the high fluctuation of supply and demand time series. To reduce the scale of these, this paper discusses different methods for their aggregation into typical periods. Each aggregation method is applied to a different type of energy system model, making the methods fairly incomparable. To overcome this, the different aggregation methods are first extended so that they can be applied to all types of multidimensional time series and then compared by applying them to different energy system configurations and analyzing their impact on the cost optimal design. It was found that regardless of the method, time series aggregation allows for significantly reduced computational resources. Nevertheless, averaged values lead to underestimation of the real system cost in comparison to the use of representative periods from the original time series. The aggregation method itself, e.g. k means clustering, plays a minor role. More significant is the system considered: Energy systems utilizing centralized resources require fewer typical periods for a feasible system design in comparison to systems with a higher share of renewable feed-in. Furthermore, for energy systems based on seasonal storage, currently existing models integration of typical periods is not suitable

Power Scheduling Method for Grid Integration of a PV-BESS CHB Inverter With SOC Balancing Capability

The paper deals with a single-phase photovoltaic (PV) inverter based on the Cascaded H-Bridge (CHB) topology for Low Voltage (LV) grid. A distributed architecture of PV sources integrated with battery energy storage systems (BESS) is proposed with the particularity of avoiding the use of dc-dc converters. A method of compensating for the short-term daily variability of PV energy is also presented. The control implements power scheduling to ensure that constant active power is fed into the grid at every predetermined time interval (e.g., every quarter of an hour). Furthermore, a dedicated hybrid modulation scheme based on a sorting algorithm for balancing the state of charge (SOC) of the single cells is proposed. Numerical investigations are carried out on a 19-level CHB inverter implemented in a PLECS®(i.e., the simulation platform for power electronic systems from Plexim) environment to validate the feasibility and effectiveness of the proposed control strategy