A 64-Channel 965-μW Neural Recording SoC with UWB Wireless Transmission in 130-nm CMOS

This brief presents a 64-channel neural recording system-on-chip (SoC) with a 20-Mb/s wireless telemetry. Each channel of the analog front end consists of a low-noise bandpass amplifier, featuring a noise efficiency factor of 3.11 with an input-referred noise of 5.6 μVrms in a 0.001- to 10-kHz band and a 31.25-kSps 6-fJ/conversion-step 10-bit SAR analog-to-digital converter. The recorded signals are multiplexed in the digital domain and transmitted via an 11.7% efficiency pulse-position modulation ultrawideband transmitter, reaching a transmission range in excess of 7.5 m. The chip has been fabricated in a 130-nm CMOS process, measures 25 mm2, and dissipates 965 μW from a 0.5-V supply. This SoC features the lowest power per channel (15 μW) and the lowest energy per bit (48.2 pJ) among state-of-the-art wireless neural recording systems with a number of channels larger than 32. The proposed circuit is able to transmit the raw neural signal in a large bandwidth (up to 10 kHz) without performing any data compression or losing vital information, such as local field potentials

Advanced spike sorting approaches in implantable VLSI wireless brain computer interfaces: a survey

Brain Computer/Machine Interfaces (BCI/BMIs) have substantial potential for enhancing the lives of disabled individuals by restoring functionalities of missing body parts or allowing paralyzed individuals to regain speech and other motor capabilities. Due to severe health hazards arising from skull incisions required for wired BCI/BMIs, scientists are focusing on developing VLSI wireless BCI implants using biomaterials. However, significant challenges, like power efficiency and implant size, persist in creating reliable and efficient wireless BCI implants. With advanced spike sorting techniques, VLSI wireless BCI implants can function within the power and size constraints while maintaining neural spike classification accuracy. This study explores advanced spike sorting techniques to overcome these hurdles and enable VLSI wireless BCI/BMI implants to transmit data efficiently and achieve high accuracy.Comment: Submitted to 37th International Conference on VLSI Design 202

Current-efficient preamplifier architecture for CMRR sensitive neural recording applications

Este trabajo fue parcialmente financiado por CSIC (Comisión Sectorial de Investigación Científica, Uruguay), ANII (Agencia Nacional de Investigación e Innovación, Uruguay) y CAP (Comisión Académica de Posgrado, Uruguay).There are neural recording applications in which the amplitude of common-mode interfering signals is several orders of magnitude higher than the amplitude of the signals of interest. This challenging situation for neural amplifiers occurs, among other applications, in neural recordings of weakly electric fish or nerve activity recordings made with cuff electrodes. This paper reports an integrated neural amplifier architecture targeting invivo recording of local field potentials and unitary signals from the brain stem of a weakly electric fish Gymnotus omarorum. The proposed architecture offers low noise, high common-mode rejection ratio (CMRR), current-efficiency, and a high-pass frequency fixed without MOS pseudoresistors. The main contributions of this work are the overall architecture coupled with an efficient and simple single-stage circuit for the amplifier main transconductor, and the ability of the amplifier to acquire biopotential signals from high-amplitude common-mode interference in an unshielded environment. A fully-integrated neural preamplifier, which performs well in line with the state-of-the-art of the field while providing enhanced CMRR performance, was fabricated in a 0.5 μm CMOS process. Results from measurements show that the gain is 49.5 dB, the bandwidth ranges from 13 Hz to 9.8 kHz, the equivalent input noise is 1.88 μVrms, the CMRR is 87 dB and the Noise Efficiency Factor is 2.1. In addition, in-vivo recordings of weakly electric fish neural activity performed by the proposed amplifier are introduced and favorably compared with those of a commercial laboratory instrumentation system

Design, Fabrication, and Validation of a Highly Miniaturized Wirelessly Powered Neural Implant

We have recently witnessed an explosion in the number of neurons that can be recorded and/or stimulated simultaneously during neurophysiological experiments. Experiments have progressed from recording or stimulation with a single electrode to Micro-Electrode Array (MEA) such as the Utah Array. These MEAs can be instrumented with current drivers, neural amplifiers, digitizers and wireless communication links. The broad interest in these MEAs suggests that there is a need for large scale neural recording and stimulation. The ultimate goal is to coordinate the recordings and stimulation of potentially thousands of neurons from many brain areas. Unfortunately, current state-of-the-art MEAs are limited by their scalability and long-term stability because of their physical size and rigid configuration. Furthermore, some applications prioritize a distributed neural interface over one that offers high resolution. Examples of biomedical applications that necessitate an interface with neurons from many sites in the brain include: i) understanding and treating neurological disorders that affect distributed locations throughout the CNS; ii) revolutionizing our understanding of the brain by studying the correlations between neural networks from different regions of the brain and the mechanisms of cognitive functions; and iii) covering larger area in the sensorimotor cortex of amputees to more accurately control robotic prosthetic limbs or better evoke a sense of touch. One solution to make large scale, fully specifiable, electrical stimulation and recording possible, is to disconnect the electrodes from the base, so that they can be arbitrarily placed, using a syringe, freely in the nervous system. To overcome the challenges of system miniaturization, we propose the “microbead”, an ultra-small neural stimulating implant, that is currently implemented in a 130nm CMOS technology with the following characteristics: 200 μm × 200 μm × 80 μm size; optimized wireless powering, all micro-electronics on single chip; and integrated electrodes and coil. The stimulating microbead is validated in a sciatic nerve by generating leg movements. A recording microbead is also investigated with following characteristics: wireless powering using steerable phased coil array, miniaturized front-end, and backscattering telemetry. These microbeads could eventually replace the rigid arrays that are currently the state-of-the-art in electrophysiology set-ups

Ultra-Low Power Circuit Design for Miniaturized IoT Platform

This thesis examines the ultra-low power circuit techniques for mm-scale Internet of Things (IoT) platforms. The IoT devices are known for their small form factors and limited battery capacity and lifespan. So, ultra-low power consumption of always-on blocks is required for the IoT devices that adopt aggressive duty-cycling for high power efficiency and long lifespan. Several problems need to be addressed regarding IoT device designs, such as ultra-low power circuit design techniques for sleep mode and energy-efficient and fast data rate transmission for active mode communication. Therefore, this thesis highlights the ultra-low power always-on systems, focusing on energy efficient optical transmission in order to miniaturize the IoT systems. First, this thesis presents a battery-less sub-nW micro-controller for an always-operating system implemented with a newly proposed logic family. Second, it proposes an always-operating sub-nW light-to-digital converter to measure instant light intensity and cumulative light exposure, which employs the characteristics of this proposed logic family. Third, it presents an ultra-low standby power optical wake-up receiver with ambient light canceling using dual-mode operation. Finally, an energy-efficient low power optical transmitter for an implantable IoT device is suggested. Implications for future research are also provided.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/145862/1/imhotep_1.pd

Miniaturised Wireless Power Transfer Systems for Neurostimulation: A Review

In neurostimulation, wireless power transfer is an efficient technology to overcome several limitations affecting medical devices currently used in clinical practice. Several methods were developed over the years for wireless power transfer. In this review article, we report and discuss the three most relevant methodologies for extremely miniaturised implantable neurostimulator: ultrasound coupling, inductive coupling and capacitive coupling. For each powering method, the discussion starts describing the physical working principle. In particular, we focus on the challenges given by the miniaturisation of the implanted integrated circuits and the related ad-hoc solutions for wireless power transfer. Then, we present recent developments and progresses in wireless power transfer for biomedical applications. Last, we compare each technique based on key performance indicators to highlight the most relevant and innovative solutions suitable for neurostimulation, with the gaze turned towards miniaturisation

ULTRA LOW POWER CIRCUITS FOR WEARABLE BIOMEDICAL SENSORS

Ph.DDOCTOR OF PHILOSOPH