On-Orbit Validation of a Framework for Spacecraft-Initiated Communication Service Requests with NASA's SCaN Testbed

We design, analyze, and experimentally validate a framework for demand-based allocation of high-performance space communication service in which the user spacecraft itself initiates a request for service. Leveraging machine-to-machine communications, the automated process has potential to improve the responsiveness and efficiency of space network operations. We propose an augmented ground station architecture in which a hemispherical-pattern antenna allows for reception of service requests sent from any user spacecraft within view. A suite of ground-based automation software acts upon these direct-to-Earth requests and allocates access to high-performance service through a ground station or relay satellite in response to immediate user demand. A software-defined radio transceiver, optimized for reception of weak signals from the helical antenna, is presented. Design and testing of signal processing equipment and a software framework to handle service requests is discussed. Preliminary results from on-orbit demonstrations with a testbed onboard the International Space Station are presented to verify feasibility of the concept

Towards a Tool-based Development Methodology for Pervasive Computing Applications

Despite much progress, developing a pervasive computing application remains a challenge because of a lack of conceptual frameworks and supporting tools. This challenge involves coping with heterogeneous devices, overcoming the intricacies of distributed systems technologies, working out an architecture for the application, encoding it in a program, writing specific code to test the application, and finally deploying it. This paper presents a design language and a tool suite covering the development life-cycle of a pervasive computing application. The design language allows to define a taxonomy of area-specific building-blocks, abstracting over their heterogeneity. This language also includes a layer to define the architecture of an application, following an architectural pattern commonly used in the pervasive computing domain. Our underlying methodology assigns roles to the stakeholders, providing separation of concerns. Our tool suite includes a compiler that takes design artifacts written in our language as input and generates a programming framework that supports the subsequent development stages, namely implementation, testing, and deployment. Our methodology has been applied on a wide spectrum of areas. Based on these experiments, we assess our approach through three criteria: expressiveness, usability, and productivity

The Empirics of General Equilibrium Trade Theory: What Have We Learned?

This paper provides a selective survey of over half a century of research linking the neoclassical trade model to the data. Tensions between restrictive formulations of the model and real world complexities have launched a research agenda aimed at refining and reformulating theory to provide more convincing links between theoretical specification and empirical research design. Three lessons stand out. First, competitive and new trade theory models are complementary rather than competing ways to look at many existing empirical regularities. Second, the Ricardian formulation has proved to be a useful framework for structural estimation exercises regarding the pattern of international specialization. Third, empirical confirmations of the core predictions of the model provide scientific support for employing the competitive trade model in structural estimation.neoclassical trade theory, estimation and testing of trade theories.

A Test Driven Approach to Develop Web-Based Machine Learning Applications

The purpose of this thesis is to propose the design and architecture of a testable, scalable, and ef-cient web-based application that models and implements machine learning applications in cancer prediction. There are various components that form the architecture of our web-based application including server, database, programming language, web framework, and front-end design. There are also other factors associated with our application such as testability, scalability, performance, and design pattern. Our main focus in this thesis is on the testability of the system while consid- ering the importance of other factors as well. The data set for our application is a subset of the Surveillance, Epidemiology, and End Results (SEER) Program of the National Cancer Institute. The application is implemented with Python as the back-end programming language, Django as the web framework, Sqlite as the database, and the built-in server of the Django framework. The front layer of the application is built using HTML, CSS and various JavaScript libraries. Our Implementation and Installation is augmented with testing phase that include unit and functional testing. There are other layers such as deploying, caching, security, and scaling that will be briefly discussed

Progress Towards an Open-Source, Low-Cost Ultrasound Computed Tomography Research System

Ultrasound Computed Tomography (UCT) systems are typically custom-built, and the high cost and long lead time can be a significant barrier to research groups becoming active in the field. This work details progress towards FlexUCT: a design framework for a low-cost benchtop UCT system that will allow novel data acquisition protocols and reconstruction algorithms to be tested on a physical system, thereby facilitating progress towards fast and accurate UCT. The design, assembly and testing of 4-element prototypes are described. Field scans of the prototypes have been performed to characterise the beamwidth, element radiation pattern and acoustic cross talk, and the pulse echo behaviour was evaluated

Quality Classified Image Analysis with Application to Face Detection and Recognition

Motion blur, out of focus, insufficient spatial resolution, lossy compression and many other factors can all cause an image to have poor quality. However, image quality is a largely ignored issue in traditional pattern recognition literature. In this paper, we use face detection and recognition as case studies to show that image quality is an essential factor which will affect the performances of traditional algorithms. We demonstrated that it is not the image quality itself that is the most important, but rather the quality of the images in the training set should have similar quality as those in the testing set. To handle real-world application scenarios where images with different kinds and severities of degradation can be presented to the system, we have developed a quality classified image analysis framework to deal with images of mixed qualities adaptively. We use deep neural networks first to classify images based on their quality classes and then design a separate face detector and recognizer for images in each quality class. We will present experimental results to show that our quality classified framework can accurately classify images based on the type and severity of image degradations and can significantly boost the performances of state-of-the-art face detector and recognizer in dealing with image datasets containing mixed quality images.Comment: 6 page

Smart phone menu layout for elderly users

Nowadays, smart phone have become prevalent across the world.Many functions and services offered in the smart phone are important but current smart phone more convenient and user friendly to younger generation.In addition, the current technologies do not adequately capture the smart phone pattern of the elderly and make them hurdles to adopting a smart phone.This study used OldGen Framework to obtain the suitable arrangement icons for smart phone main screen.The objectives of this study are to identify usability issues that elderly faced due to smart phone and to recommend interface design for elderly smart phone.This study used two methods which are user testing and drawing method.As a result, usability issues can be identified and recommendations of user interface design for elderly smart phone main screen

A Software Framework for Storing User Workspaces of Desktop Applications

There are many design problems faced in user interface design of desktop applications. For most of the problems there is some suitable design pattern or existing software component to cope the problem, without having to spend too much design time on it. This research concentrates on one design problem repeatedly faced when designing desktop applications; storing and restoring user workspaces. The main goal of this thesis is to solve presented design problem by constructing a design model for a software component which can be used in the upcoming application projects. The aim is also to build this design as an external software framework and to test its applicability in practice. The solution developed during this research will be built and evaluated through a case study at an industrial software subcontractor company. Constructive research approach is used as the research method for this study, because the purpose of this thesis is to produce a practically relevant solution for an explicit problem, which is usually the baseline of a constructive study. At first, the theory related to the subject is presented and discussed. Existing project documentation in the case organization is studied to gather the requirements for the solution. How to create the solution as a reusable software framework is also discussed. Collected theoretical knowledge is then applied in practice by building the software framework. Practical relevance of the software framework is evaluated by deploying it to different types of application projects. The testing is performed by a group of software designers working in the case organization. A questionnaire then held for the software designers shows that the developed framework succeeds to fulfill its requirements.fi=Opinnäytetyö kokotekstinä PDF-muodossa.|en=Thesis fulltext in PDF format.|sv=Lärdomsprov tillgängligt som fulltext i PDF-format

Testability considerations for implementing an embedded memory subsystem

textThere are a number of testability considerations for VLSI design, but test coverage, test time, accuracy of test patterns and correctness of design information for DFD (Design for debug) are the most important ones in design with embedded memories. The goal of DFT (Design-for-Test) is to achieve zero defects. When it comes to the memory subsystem in SOCs (system on chips), many flavors of memory BIST (built-in self test) are able to get high test coverage in a memory, but often, no proper attention is given to the memory interface logic (shadow logic). Functional testing and BIST are the most prevalent tests for this logic, but functional testing is impractical for complicated SOC designs. As a result, industry has widely used at-speed scan testing to detect delay induced defects. Compared with functional testing, scan-based testing for delay faults reduces overall pattern generation complexity and cost by enhancing both controllability and observability of flip-flops. However, without proper modeling of memory, Xs are generated from memories. Also, when the design has chip compression logic, the number of ATPG patterns is increased significantly due to Xs from memories. In this dissertation, a register based testing method and X prevention logic are presented to tackle these problems. An important design stage for scan based testing with memory subsystems is the step to create a gate level model and verify with this model. The flow needs to provide a robust ATPG netlist model. Most industry standard CAD tools used to analyze fault coverage and generate test vectors require gate level models. However, custom embedded memories are typically designed using a transistor-level flow, there is a need for an abstraction step to generate the gate models, which must be equivalent to the actual design (transistor level). The contribution of the research is a framework to verify that the gate level representation of custom designs is equivalent to the transistor-level design. Compared to basic stuck-at fault testing, the number of patterns for at-speed testing is much larger than for basic stuck-at fault testing. So reducing test and data volume are important. In this desertion, a new scan reordering method is introduced to reduce test data with an optimal routing solution. With in depth understanding of embedded memories and flows developed during the study of custom memory DFT, a custom embedded memory Bit Mapping method using a symbolic simulator is presented in the last chapter to achieve high yield for memories.Electrical and Computer Engineerin