21,095 research outputs found
Signal Reconstruction via H-infinity Sampled-Data Control Theory: Beyond the Shannon Paradigm
This paper presents a new method for signal reconstruction by leveraging
sampled-data control theory. We formulate the signal reconstruction problem in
terms of an analog performance optimization problem using a stable
discrete-time filter. The proposed H-infinity performance criterion naturally
takes intersample behavior into account, reflecting the energy distributions of
the signal. We present methods for computing optimal solutions which are
guaranteed to be stable and causal. Detailed comparisons to alternative methods
are provided. We discuss some applications in sound and image reconstruction
CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit
This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits and drawbacks, the paper proposes a synthesis approach for PWL dynamic systems, based on state-variable methods, and identifies the associated analog operators. The GmC approach, combining quasi-linear VCCS's, PWL VCCS's, and capacitors is then explored regarding the implementation of these operators. CMOS basic building blocks for the realization of the quasi-linear VCCS's and PWL VCCS's are presented and applied to design a Chua's circuit IC. The influence of GmC parasitics on the performance of dynamic PWL systems is illustrated through this example. Measured chaotic attractors from a Chua's circuit prototype are given. The prototype has been fabricated in a 2.4- mu m double-poly n-well CMOS technology, and occupies 0.35 mm/sup 2/, with a power consumption of 1.6 mW for a +or-2.5-V symmetric supply. Measurements show bifurcation toward a double-scroll Chua's attractor by changing a bias current
Indirect test of M-S circuits using multiple specification band guarding
Testing analog and mixed-signal circuits is a costly task due to the required test time targets and high end technical resources. Indirect testing methods partially address these issues providing an efficient solution using easy to measure CUT information that correlates with circuit performances. In this work, a multiple specification band guarding technique is proposed as a method to achieve a test target of misclassified circuits. The acceptance/rejection test regions are encoded using octrees in the measurement space, where the band guarding factors precisely tune the test decision boundary according to the required test yield targets. The generated octree data structure serves to cluster the forthcoming circuits in the production testing phase by solely relying on indirect measurements. The combined use of octree based encoding and multiple specification band guarding makes the testing procedure fast, efficient and highly tunable. The proposed band guarding methodology has been applied to test a band-pass Butterworth filter under parametric variations. Promising simulation results are reported showing remarkable improvements when the multiple specification band guarding criterion is used.Peer ReviewedPostprint (author's final draft
MIMO-UFMC Transceiver Schemes for Millimeter Wave Wireless Communications
The UFMC modulation is among the most considered solutions for the
realization of beyond-OFDM air interfaces for future wireless networks. This
paper focuses on the design and analysis of an UFMC transceiver equipped with
multiple antennas and operating at millimeter wave carrier frequencies. The
paper provides the full mathematical model of a MIMO-UFMC transceiver, taking
into account the presence of hybrid analog/digital beamformers at both ends of
the communication links. Then, several detection structures are proposed, both
for the case of single-packet isolated transmission, and for the case of
multiple-packet continuous transmission. In the latter situation, the paper
also considers the case in which no guard time among adjacent packets is
inserted, trading off an increased level of interference with higher values of
spectral efficiency. At the analysis stage, the several considered detection
structures and transmission schemes are compared in terms of bit-error-rate,
root-mean-square-error, and system throughput. The numerical results show that
the proposed transceiver algorithms are effective and that the linear MMSE data
detector is capable of well managing the increased interference brought by the
removal of guard times among consecutive packets, thus yielding throughput
gains of about 10 - 13 . The effect of phase noise at the receiver is also
numerically assessed, and it is shown that the recursive implementation of the
linear MMSE exhibits some degree of robustness against this disturbance
Workshop on Verification and Theorem Proving for Continuous Systems (NetCA Workshop 2005)
Oxford, UK, 26 August 200
A short survey on nonlinear models of the classic Costas loop: rigorous derivation and limitations of the classic analysis
Rigorous nonlinear analysis of the physical model of Costas loop --- a
classic phase-locked loop (PLL) based circuit for carrier recovery, is a
challenging task. Thus for its analysis, simplified mathematical models and
numerical simulation are widely used. In this work a short survey on nonlinear
models of the BPSK Costas loop, used for pre-design and post-design analysis,
is presented. Their rigorous derivation and limitations of classic analysis are
discussed. It is shown that the use of simplified mathematical models, and the
application of non rigorous methods of analysis (e.g., simulation and
linearization) may lead to wrong conclusions concerning the performance of the
Costas loop physical model.Comment: Accepted to American Control Conference (ACC) 2015 (Chicago, USA
An investigation of potential applications of OP-SAPS: Operational Sampled Analog Processors
The application of OP-SAP's (operational sampled analog processors) in pattern recognition system is summarized. Areas investigated include: (1) human face recognition; (2) a high-speed programmable transversal filter system; (3) discrete word (speech) recognition; and (4) a resolution enhancement system
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