Design of a 1-chip IBM-3270 protocol handler

The single-chip design of a 20MHz IBM-3270 coax protocol handler in a conventional 3 μ CMOS process-technology is discussed. The harmonious combination of CMOS circuit tricks and high-level design disciplines allows the 50k transistor design to be compiled and optimized into a 35 mm**2 chip in 4 manweeks. The design methodology stresses the application of high-level silicon constructs and built-in testability

The Hyper-X Flight Systems Validation Program

For the Hyper-X/X-43A program, the development of a comprehensive validation test plan played an integral part in the success of the mission. The goal was to demonstrate hypersonic propulsion technologies by flight testing an airframe-integrated scramjet engine. Preparation for flight involved both verification and validation testing. By definition, verification is the process of assuring that the product meets design requirements; whereas validation is the process of assuring that the design meets mission requirements for the intended environment. This report presents an overview of the program with emphasis on the validation efforts. It includes topics such as hardware-in-the-loop, failure modes and effects, aircraft-in-the-loop, plugs-out, power characterization, antenna pattern, integration, combined systems, captive carry, and flight testing. Where applicable, test results are also discussed. The report provides a brief description of the flight systems onboard the X-43A research vehicle and an introduction to the ground support equipment required to execute the validation plan. The intent is to provide validation concepts that are applicable to current, follow-on, and next generation vehicles that share the hybrid spacecraft and aircraft characteristics of the Hyper-X vehicle

Supporting Cyber-Physical Systems with Wireless Sensor Networks: An Outlook of Software and Services

Sensing, communication, computation and control technologies are the essential building blocks of a cyber-physical system (CPS). Wireless sensor networks (WSNs) are a way to support CPS as they provide fine-grained spatial-temporal sensing, communication and computation at a low premium of cost and power. In this article, we explore the fundamental concepts guiding the design and implementation of WSNs. We report the latest developments in WSN software and services for meeting existing requirements and newer demands; particularly in the areas of: operating system, simulator and emulator, programming abstraction, virtualization, IP-based communication and security, time and location, and network monitoring and management. We also reflect on the ongoing efforts in providing dependable assurances for WSN-driven CPS. Finally, we report on its applicability with a case-study on smart buildings

Conceptual design study of a Harrier V/STOL research aircraft

MCAIR recently completed a conceptual design study to define modification approaches to, and derive planning prices for the conversion of a two place Harrier to a V/STOL control, display and guidance research aircraft. Control concepts such as rate damping, attitude stabilization, velocity command, and cockpit controllers are to be demonstrated. Display formats will also be investigated, and landing, navigation and guidance systems flight tested. The rear cockpit is modified such that it can be quickly adapted to faithfully simulate the controls, displays and handling qualities of a Type A or Type B V/STOL. The safety pilot always has take command capability. The modifications studied fall into two categories: basic modifications and optional modifications. Technical descriptions of the basic modifications and of the optional modifications are presented. The modification plan and schedule as well as the test plan and schedule are presented. The failure mode and effects analysis, aircraft performance, aircraft weight, and aircraft support are discussed

Guidance, Navigation and Control System of a Hopper Spacecraft Simulator

The space hopper simulator project drew its origin from a partnership with Penn State University to compete in the Google Lunar XPRIZE competition. Lehigh University is tasked with the exploring the guidance, navigation and control (GN&C) system of the hopper spacecraft. To simulate the dynamics and flight behavior of the concept, Earth-based multirotor flying platforms were developed with the end goal of executing the hopping maneuver.The overall project has been ongoing for more than 5 years and went through several major revisions to fix flaws discovered in the previous design. As older students graduate and new teams are form, knowledge and experience are lost in the process. Due to the time it take to relearn and redesign the simulators, the project progress only get as far as achieving radio controlled flight. The current and 3rd generation development team aims to change that by developing both the hardware and software using modular design.With modular design, the manufacturing, repair and modification process for the multirotor speed up significantly. The damaged component can be replaced with little effort. In addition to the hardware advantages, the software modules enable concurrent development of both a PID and a Fuzzy Logic based flight control system using similar avionics and software architecture. Since the flight operating system function by linking the various software modules, individual modules can easily be swapped to test different control laws, electronic devices, etc. The software modules are also capable of being reused in other applications, such as running the thrust test stand and logging data with the wireless ground station.In theory and simulation, the GN&C system is quite simple. The hopping guidance trajectory can be generated by a set of linear and trigonometric equations. The trajectory can be optimized by minimizing the total energy consumption at the end of the hopping maneuver. The navigational data can be collected from the GPS and localized for the cascade PID controllers to achieve the desired trajectory. In the ideal world, everything is simple and easy.In the real world, a range of problems arise during implementation. Factors such as time delay and noises significantly impact the performance of the control system, making stable aggressive tuning very difficult to achieve. In an attempt to improve the condition, a number of digital filters such as the moving average filter and the Kalman filter were explored. In addition, every sub-system was analyzed in depth to optimize for speed. This resulted in 3 major revisions in changing flight computer and programming languages.Even though the main topic of this research is the guidance, navigation and control system, the project quickly expanded into a systems engineering problem. Everything must work well together in order for the aircraft to achieve stable flight

Quick Start Guide to VHDL

The purpose of a hardware description languages is to describe digital circuitry using a text-based language. HDLs provide a means to describe large digital systems without the need for schematics, which can become impractical in very large designs. HDLs have evolved to support logic simulation at different levels of abstraction

Low-Latency Rendering With Dataflow Architectures

Recent years have seen a resurgence of virtual reality (VR), sparked by the repurposing of low-cost COTS components. VR aims to generate stimuli that appear to come from a source other than the interface through which they are delivered. The synthetic stimuli replace real-world stimuli, and transport the user to another, perhaps imaginary, “place.” To do this, we must overcome many challenges, often related to matching the synthetic stimuli to the expectations and behavior of the real world. One way in which the stimuli can fail is its latency–– the time between a user's action and the computer's response. We constructed a novel VR renderer, that optimized latency above all else. Our prototype allowed us to explore how latency affects human–computer interaction. We had to completely reconsider the interaction between time, space, and synchronization on displays and in the traditional graphics pipeline. Using a specialized architecture––dataflow computing––we combined consumer, industrial, and prototype components to create an integrated 1:1 room-scale VR system with a latency of under 3 ms. While this was prototype hardware, the considerations in achieving this performance inform the design of future VR pipelines, and our human factors studies have provided new and sometimes surprising contributions to the body of knowledge on latency in HCI