Integrated DC-DC boost converters using CMOS silicon on Sapphire Technology

With the recent advancements in semiconductor manufacturing towards smaller, faster and more efficient microelectronic systems, the problems of increasing leakage current and reduced breakdown voltage in bulk-CMOS transistors have become substantial in the sub-100-nanometer era. The Peregrine UltraCMOS Silicon-on-Sapphire (SOS) technology that uses highly-insulating sapphire substrate as insulator was introduced to meet the continually growing need for higher performance RF products. The electrically isolated circuit elements in the UltraCMOS technology lead to increased switching speeds and lower power consumption due to reduced junction and parasitic capacitances. Furthermore, the growing need for high-speed switching applications such as boosting a lower voltage level to a higher one gives the UltraCMOS technology an upper hand over the bulk-CMOS process. The limitation to using an UltraCMOS transistor is that its maximum drain to source voltage (VDS ) swing is 2.5V. This thesis aims to address this limitation by studying and implementing various stacking techniques in high power switching applications where voltage switching of higher than 2.5V are required. Fully-integrated DC to DC boost converters with switching circuits based on dynamically self-biased stacked transistors are proposed. For high voltage and high power handling, the proposed stacking techniques equally distribute the overall output voltage to less than 2.5V across each stacked transistor in the switch (V DS of 2.5V)

RF Power Transfer, Energy Harvesting, and Power Management Strategies

Energy harvesting is the way to capture green energy. This can be thought of as a recycling process where energy is converted from one form (here, non-electrical) to another (here, electrical). This is done on the large energy scale as well as low energy scale. The former can enable sustainable operation of facilities, while the latter can have a significant impact on the problems of energy constrained portable applications. Different energy sources can be complementary to one another and combining multiple-source is of great importance. In particular, RF energy harvesting is a natural choice for the portable applications. There are many advantages, such as cordless operation and light-weight. Moreover, the needed infra-structure can possibly be incorporated with wearable and portable devices. RF energy harvesting is an enabling key player for Internet of Things technology. The RF energy harvesting systems consist of external antennas, LC matching networks, RF rectifiers for ac to dc conversion, and sometimes power management. Moreover, combining different energy harvesting sources is essential for robustness and sustainability. Wireless power transfer has recently been applied for battery charging of portable devices. This charging process impacts the daily experience of every human who uses electronic applications. Instead of having many types of cumbersome cords and many different standards while the users are responsible to connect periodically to ac outlets, the new approach is to have the transmitters ready in the near region and can transfer power wirelessly to the devices whenever needed. Wireless power transfer consists of a dc to ac conversion transmitter, coupled inductors between transmitter and receiver, and an ac to dc conversion receiver. Alternative far field operation is still tested for health issues. So, the focus in this study is on near field. The goals of this study are to investigate the possibilities of RF energy harvesting from various sources in the far field, dc energy combining, wireless power transfer in the near field, the underlying power management strategies, and the integration on silicon. This integration is the ultimate goal for cheap solutions to enable the technology for broader use. All systems were designed, implemented and tested to demonstrate proof-of concept prototypes

Pipelined analog-to-digital conversion using current-mode reference shifting

Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica e de ComputadoresPipeline Analog-to-digital converters (ADCs) are the most popular architecture for high-speed medium-to-high resolution applications. A fundamental, but often unreferenced building block of pipeline ADCs are the reference voltage circuits. They are required to maintain a stable reference with low output impedance to drive large internal switched capacitor loads quickly. Achieving this usually leads to a scheme that consumes a large portion of the overall power and area. A review of the literature shows that the required stable reference can be achieved with either on-chip buffering or with large off-chip decoupling capacitors. On-chip buffering is ideal for system integration but requires a high speed buffer with high power dissipation. The use of a reference with off-chip decoupling results in significant power savings but increases the pads of chip, the count of external components and the overall system cost. Moreover the amount of ringing on the internal reference voltage caused by the series inductance of the package makes this solution not viable for high speed ADCs. To address this challenge, a pipeline ADC employing a multiplying digital-to-analog converter (MDAC) with current-mode reference shifting is presented. Consequently, no reference voltages and, therefore, no voltage buffers are necessary. The bias currents are generated on-chip by a reference current generator that dissipates low power. The proposed ADC is designed in a 65 nm CMOS technology and operates at sampling rates ranging from 10 to 80 MS/s. At 40 MS/s the ADC dissipates 10.8 mW from a 1.2 V power supply and achieves an SNDR of 57.2 dB and a THD of -68 dB, corresponding to an ENOB of 9.2 bit. The corresponding figure of merit is 460 fJ/step

Analog baseband circuits for sensor systems

This thesis is composed of six publications and an overview of the research topic, which also summarizes the work. The research presented in this thesis focuses on research into analog baseband circuits for sensor systems. The research is divided into three different topics: the integration of analog baseband circuits into a radio receiver for sensor applications; the integration of an ΔΣ modulator A/D converter into a GSM/WCDMA radio receiver for mobile phones, and the integration of algorithmic A/D converters for a capacitive micro-accelerometer interface. All the circuits are implemented using deep sub-micron CMOS technologies. The work summarizes the design of different blocks for sensor systems. The research into integrated analog baseband circuits for a radio receiver focuses on a circuit structures with a very low power dissipation and that can be implemented using only standard CMOS technologies. The research into integrated ΔΣ modulator A/D converter design for a GSM/WCDMA radio receiver for mobile phones focuses on the implications for analog circuit design emerging from using a very deep sub-micron CMOS process. Finally, in the research into algorithmic A/D converters for a capacitive microaccelerometer interface, new ways of achieving a good performance with low power dissipation, while also minimizing the silicon area of the integrated A/D converter are introduced

Powering Systems From Ambient Energy Sources

Ambient intelligence and the Internet of Things will require flexible and energy efficient hardware platforms to implement the long-term deployed wireless devices that form the physical substrate for these emerging cyberphysical systems. Energy harvesting from environmental sources such as light and mechanical vibration can extend battery life for devices as long as efficient power management circuits are available. Self-timed circuits, power-on resets, integrated switched-capacitor DC/DC converters and adaptively-biased linear regulators are complementary circuit techniques that can reduce cost and power consumption for microwatt energy harvesting and energy scalable systems. Low power and low voltage analog and digital circuits for sampling, digitizing, and processing external signals are essential for powering systems from ambient energy sources. This talk presents an overview of these topics and describes how exploiting the relationship between system requirements, circuits, and environmental energy sources can enable the emergence of the Internet of Things

Variable Spurious Noise Mitigation Techniques in Hysteretic Buck Converters

This work proposes a current-mode hysteretic buck converter with a spur-free constant-cycle frequency-hopping controller that fully eliminates spurs from the switching noise spectrum irrespective of variations in the switching frequency and operating conditions. As a result, the need for frequency regulation loops to ensure non-varying switching frequency (i.e. fixed spurs location) in hysteretic controllers is eliminated. Moreover, compared to frequency regulation loops, the proposed converter offers the advantage of eliminating mixing and interference altogether due to its spur-free operation, and thus, it can be used to power, or to be integrated within noise-sensitive systems while benefiting from the superior dynamic performance of its hysteretic operation. The proposed converter uses dual-sided hysteretic band modulation to eliminate the inductor current imbalance that results from frequency hopping along with the output voltage transients and low-frequency noise floor peaking associated with it. Moreover, a feedforward adaptive hysteretic band controller is proposed to reduce variations in the switching frequency with the input voltage, and an all-digital soft-startup circuit is proposed to control the in-rush current without requiring any off-chip components. The converter is implemented in a 0.35-õm standard CMOS technology and it achieves 92% peak efficiency