CMOS-Compatible Room-Temperature Rectifier Toward Terahertz Radiation Detection

In this paper, we present a new rectifying device, compatible with the technology of CMOS image sensors, suitable for implementing a direct-conversion detector operating at room temperature for operation at up to terahertz frequencies. The rectifying device can be obtained by introducing some simple modifications of the charge-storage well in conventional CMOS integrated circuits, making the proposed solution easy to integrate with the existing imaging systems. The rectifying device is combined with the different elements of the detector, composed of a 3D high-performance antenna and a charge-storage well. In particular, its position just below the edge of the 3D antenna takes maximum advantage of the high electric field concentrated by the antenna itself. In addition, the proposed structure ensures the integrity of the charge-storage well of the detector. In the structure, it is not necessary to use very scaled and costly technological nodes, since the CMOS transistor only provides the necessary integrated readout electronics. On-wafer measurements of RF characteristics of the designed junction are reported and discussed. The overall performances of the entire detector in terms of noise equivalent power (NEP) are evaluated by combining low-frequency measurements of the rectifier with numerical simulations of the 3D antenna and the semiconductor structure at 1 THz, allowing prediction of the achievable NEP

Novel ring resonator-based integrated photonic beamformer for broadband phased array receive antennas - part I: design and performance analysis

A novel optical beamformer concept is introduced that can be used for seamless control of the reception angle in broadband wireless receivers employing a large phased array antenna (PAA). The core of this beamformer is an optical beamforming network (OBFN), using ring resonator-based broadband delays, and coherent optical combining. The electro-optical conversion is performed by means of single-sideband suppressed carrier modulation, employing a common laser, Mach-Zehnder modulators, and a common optical sideband filter after the OBFN. The unmodulated laser signal is then re-injected in order to perform balanced coherent optical detection, for the opto-electrical conversion. This scheme minimizes the requirements on the complexity of the OBFN, and has potential for compact realization by means of full integration on chip. The impact of the optical beamformer concept on the performance of the full receiver system is analyzed, by modeling the combination of the PAA and the beamformer as an equivalent two-port RF system. The results are illustrated by a numerical example of a PAA receiver for satellite TV reception, showing that—when properly designed—the beamformer hardly affects the sensitivity of the receiver

High-Responsivity Graphene-Boron Nitride Photodetector and Autocorrelator in a Silicon Photonic Integrated Circuit

Graphene and other two-dimensional (2D) materials have emerged as promising materials for broadband and ultrafast photodetection and optical modulation. These optoelectronic capabilities can augment complementary metal-oxide-semiconductor (CMOS) devices for high-speed and low-power optical interconnects. Here, we demonstrate an on-chip ultrafast photodetector based on a two-dimensional heterostructure consisting of high-quality graphene encapsulated in hexagonal boron nitride. Coupled to the optical mode of a silicon waveguide, this 2D heterostructure-based photodetector exhibits a maximum responsivity of 0.36 A/W and high-speed operation with a 3 dB cut-off at 42 GHz. From photocurrent measurements as a function of the top-gate and source-drain voltages, we conclude that the photoresponse is consistent with hot electron mediated effects. At moderate peak powers above 50 mW, we observe a saturating photocurrent consistent with the mechanisms of electron-phonon supercollision cooling. This nonlinear photoresponse enables optical on-chip autocorrelation measurements with picosecond-scale timing resolution and exceptionally low peak powers

Microwave and RF Applications for Micro-resonator based Frequency Combs

Photonic integrated circuits that exploit nonlinear optics in order to generate and process signals all-optically have achieved performance far superior to that possible electronically - particularly with respect to speed. We review the recent achievements based in new CMOS-compatible platforms that are better suited than SOI for nonlinear optics, focusing on radio frequency (RF) and microwave based applications that exploit micro-resonator based frequency combs. We highlight their potential as well as the challenges to achieving practical solutions for many key applications. These material systems have opened up many new capabilities such as on-chip optical frequency comb generation and ultrafast optical pulse generation and measurement. We review recent work on a photonic RF Hilbert transformer for broadband microwave in-phase and quadrature-phase generation based on an integrated frequency optical comb. The comb is generated using a nonlinear microring resonator based on a CMOS compatible, high-index contrast, doped-silica glass platform. The high quality and large frequency spacing of the comb enables filters with up to 20 taps, allowing us to demonstrate a quadrature filter with more than a 5-octave (3 dB) bandwidth and an almost uniform phase response.Comment: 10 pages, 6 figures, 68 references. arXiv admin note: substantial text overlap with arXiv:1512.0174

CIRCUIT MODULES FOR BROADBAND CMOS SIX-PORT SYSTEMS

This dissertation investigates four circuit modules used in a CMOS integrated six-port measurement system. The first circuit module is a wideband power source generator, which can be implemented with a voltage controlled ring oscillator. The second circuit module is a low-power 0.5 GHz - 20.5 GHz power detector with an embedded amplifier and a wideband quasi T-coil matching network. The third circuit module is a six-port circuit, which can be implemented with distributed or lumped- lement techniques. The fourth circuit module is the phase sifter used as calibration loads. The theoretical analysis, circuit design, simulated or experimental verifications of each circuit module are also included

System-level design and RF front-end implementation for a 3-10ghz multiband-ofdm ultrawideband receiver and built-in testing techniques for analog and rf integrated circuits

This work consists of two main parts: a) Design of a 3-10GHz UltraWideBand (UWB) Receiver and b) Built-In Testing Techniques (BIT) for Analog and RF circuits. The MultiBand OFDM (MB-OFDM) proposal for UWB communications has received significant attention for the implementation of very high data rate (up to 480Mb/s) wireless devices. A wideband LNA with a tunable notch filter, a downconversion quadrature mixer, and the overall radio system-level design are proposed for an 11-band 3.4-10.3GHz direct conversion receiver for MB-OFDM UWB implemented in a 0.25mm BiCMOS process. The packaged IC includes an RF front-end with interference rejection at 5.25GHz, a frequency synthesizer generating 11 carrier tones in quadrature with fast hopping, and a linear phase baseband section with 42dB of gain programmability. The receiver IC mounted on a FR-4 substrate provides a maximum gain of 67-78dB and NF of 5-10dB across all bands while consuming 114mA from a 2.5V supply. Two BIT techniques for analog and RF circuits are developed. The goal is to reduce the test cost by reducing the use of analog instrumentation. An integrated frequency response characterization system with a digital interface is proposed to test the magnitude and phase responses at different nodes of an analog circuit. A complete prototype in CMOS 0.35mm technology employs only 0.3mm2 of area. Its operation is demonstrated by performing frequency response measurements in a range of 1 to 130MHz on 2 analog filters integrated on the same chip. A very compact CMOS RF RMS Detector and a methodology for its use in the built-in measurement of the gain and 1dB compression point of RF circuits are proposed to address the problem of on-chip testing at RF frequencies. The proposed device generates a DC voltage proportional to the RMS voltage amplitude of an RF signal. A design in CMOS 0.35mm technology presents and input capacitance <15fF and occupies and area of 0.03mm2. The application of these two techniques in combination with a loop-back test architecture significantly enhances the testability of a wireless transceiver system

On the Application of a Monolithic Array for Detecting Intensity-Correlated Photons Emitted by Different Source Types

It is not widely appreciated that many subtleties are involved in the accurate measurement of intensity-correlated photons; even for the original experiments of Hanbury Brown and Twiss (HBT). Using a monolithic 4x4 array of single-photon avalanche diodes (SPADs), together with an off-chip algorithm for processing streaming data, we investigate the difficulties of measuring second-order photon correlations g2 in a wide variety of light fields that exhibit dramatically different correlation statistics: a multimode He-Ne laser, an incoherent intensity-modulated lamp-light source and a thermal light source. Our off-chip algorithm treats multiple photon-arrivals at pixel-array pairs, in any observation interval, with photon fluxes limited by detector saturation, in such a way that a correctly normalized g2 function is guaranteed. The impact of detector background correlations between SPAD pixels and afterpulsing effects on second-order coherence measurements is discussed. These results demonstrate that our monolithic SPAD array enables access to effects that are otherwise impossible to measure with stand-alone detectors.Comment: 17 pages, 6 figure

Phased Array Systems in Silicon

Phased array systems, a special case of MIMO systems, take advantage of spatial directivity and array gain to increase spectral efficiency. Implementing a phased array system at high frequency in a commercial silicon process technology presents several challenges. This article focuses on the architectural and circuit-level trade-offs involved in the design of the first silicon-based fully integrated phased array system operating at 24 GHz. The details of some of the important circuit building blocks are also discussed. The measured results demonstrate the feasibility of using integrated phased arrays for wireless communication and vehicular radar applications at 24 GHz