Power conversion techniques in nanometer CMOS for low-power applications

As System-on-Chip (SoCs) in nanometer CMOS technologies grow larger, the power management process within these SoCs becomes very challenging. In the heart of this process lies the challenge of implementing energy-efficient and cost-effective DC-DC power converters. To address this challenge, this thesis studies in details three different aspects of DC-DC power converters and proposes potential solutions. First, to maximize power conversion efficiency, loss mechanisms must be studied and quantified. For that purpose, we provide comprehensive analysis and modeling of the various switching and conduction losses in low-power synchronous DC-DC buck converters in both Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM) operation, including the case with non-rail gate control of the power switches. Second, a DC-DC buck converter design with only on-chip passives is proposed and implemented in 65-nm CMOS technology. The converter switches at 588 MHz and uses a 20-nH and 300-pF on-chip inductor and capacitor respectively, and provides up to 30-mA of load at an output voltage in the range of 0.8-1.2 V. The proposed design features over 10% improvement in power conversion efficiency over a corresponding linear regulator while preserving low-cost implementation. Finally, a 40-mA buck converter design operating in the inherently-stable DCM mode for the entire load range is presented. It employs a Pulse Frequency Modulation (PFM) scheme using a Hysteretic-Assisted Adaptive Minimum On-Time (HA-AMOT) controller to automatically adapt to a wide range of operating scenarios while minimizing inductor peak current. As a result, compact silicon area, low quiescent current, high efficiency, and robust performance across all conditions can be achieved without any calibration

High Performance Low Voltage Power Mosfet For High-frequency Synchronous Buck Converters

Power management solutions such as voltage regulator (VR) mandate DC-DC converters with high power density, high switching frequency and high efficiency to meet the needs of future computers and telecom equipment. The trend towards DC-DC converters with higher switching frequency presents significant challenges to power MOSFET technology. Optimization of the MOSFETs plays an important role in improving low-voltage DC-DC converter performance. This dissertation focuses on developing and optimizing high performance low voltage power MOSFETs for high frequency applications. With an inherently large gate charge, the trench MOSFET suffers significant switching power losses and cannot continue to provide sufficient performance in high frequency applications. Moreover, the influence of parasitic impedance introduced by device packaging and PCB assembly in board level power supply designs becomes more pronounced as the output voltage continues to decrease and the nominal current continues to increase. This eventually raises the need for highly integrated solutions such as power supply in package (PSiP) or on chip (PSoC). However, it is often more desirable in some PSiP architectures to reverse the source/drain electrodes from electrical and/or thermal point of view. In this dissertation, a stacked-die Power Block PSiP architecture is first introduced to enable DC-DC buck converters with a current rating up to 40 A and a switching frequency in the MHz range. New high- and low-side NexFETs are specially designed and optimized for the new PSiP architecture to maximize its efficiency and power density. In particular, a new NexFET structure with iv its source electrode on the bottom side of the die (source-down) is designed to enable the innovative stacked-die PSiP technology with significantly reduced parasitic inductance and package footprint. It is also observed that in synchronous buck converter very fast switching of power MOSFETs sometimes leads to high voltage oscillations at the phase node of the buck converter, which may introduce additional power loss and cause EMI related problems and undesirable electrical stress to the power MOSFET. At the same time, the synchronous MOSFET plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact the performance of the SyncFET. This dissertation introduces a new approach to effectively overcome the aforementioned challenges associated with the state-of-art technology. The threshold voltage of the low-side NexFET is intentionally reduced to minimize the conduction and body diode related power losses. Meanwhile, a monolithically integrated gate voltage pull-down circuitry is proposed to overcome the possible Cdv/dt induced turn-on issue inadvertently induced by the low VTH SynFET. Through extensive modeling and simulation, all these innovative concepts are integrated together in a power module and fabricated with a 0.35µm process. With all these novel device technology improvements, the new power module delivers a significant improvement in efficiency and offers an excellent solution for future high frequency, high current density DC-DC converters. Megahertz operation of a Power v Block incorporating these new device techniques is demonstrated with an excellent efficiency observed

Design of High Efficiency Step-Down Converter for Electro Chemical Energy Conversion

Recently the research interest in power electronics interface for fuel cell has increased. And the static characteristics of fuel cells show more than a 30% difference in the output voltage between no-load to full-load conditions. Thus inevitable decrease, which is caused by internal losses, reduces the utilization of fuel cells at low loads. Fuel cell is a electrochemical energy conversion device which directly produces electricity. Thus, a step-down converter is required to transfer  from a high input  voltage  to an efficient and constant low level voltage. Maintaining high efficiency under a wide loading range is important in fuel cell.The aim of this work is to design a stepdown converter with DCM operation under light load not only can  reach high  efficiency  in heavy-load, but also has great improvement in light-load efficiency. The output accuracy and the output ripples obtained are better than other converters under light-load and as good as a normal PWM converter under heavy-load. Circuit simplicity and high reliability are the major advantages of the proposed converter. Using this technique, the utilization factor and efficiency of the fuel cell is increased. And this paper, focuses on the simulation and implementation of DC-DC converter fed fuel cell. Validation of the proposed model is verified through simulation. Keywords: Fuel cell, Stepdown converter, PW

A Dual-Supply Buck Converter with Improved Light-Load Efficiency

Power consumption and device size have been placed at the primary concerns for battery-operated portable applications. Switching converters gain popularity in powering portable devices due to their high efficiency, compact sizes and high current delivery capability. However portable devices usually operate at light loads most of the time and are only required to deliver high current in very short periods, while conventional buck converter suffers from low efficiency at light load due to the switching losses that do not scale with load current. In this research, a novel technique for buck converter is proposed to reduce the switching loss by reducing the effective voltage supply at light load. This buck converter, implemented in TSMC 0.18 micrometers CMOS technology, operates with a input voltage of 3.3V and generates an output voltage of 0.9V, delivers a load current from 1mA to 400mA, and achieves 54 percent ~ 91 percent power efficiency. It is designed to work with a constant switching frequency of 3MHz. Without sacrificing output frequency spectrum or output ripple, an efficiency improvement of up to 20 percent is obtained at light load

Analysis of the effect of modulation delays on the size of the output capacitor

Constant frequency (PWM), constant on-time (COT) and constant off-time modulations exhibit inherent delays where the controller is unable to respond instantaneously. These delays can increase the required size of the output capacitor to meet dynamic requirements in applications with high demanding load such as the supply of microprocessors. This paper analyzes the minimum required output filter (output inductor and output capacitor) to meet a given specification and quantifies the effect that different modulations have in the minimum size of the output capacitor. The paper also shows a novel technique to mitigate the delays of the modulations by means of synchronizing the load step with the clock of the modulation. This technique is applicable to most of controllers as it only acts on the modulator

A Fast Response Dual Mode Buck Converter with Automatic Mode Transition

Dual mode DC-DC converters utilizing PWM and PFM modes of operation have been widely used to improve the efficiency over a wide range of the load current. Due to the highly varying nature of the load, it is beneficial to have the converter switch between the modes without an external mode select signal. This work proposes a new technique for automatic mode switching which maintains very high efficiency at light loads and at the same time, keeps the output well regulated during a load transient from sleep to the active state. The Constant On-time PFM scheme and a zero current detector avoids the use of an accurate current sensing block. The power supply rejection is also improved using feed-forward paths from the supply in both the PWM and PFM modes. A new implementation of the PWM controller with clamped error voltage required to meet the specifications is also shown. The proposed feedback implementation using a programmable current source and resistance provides smooth output programming

Buck Converter

The recent sustainable energy growth triggered a huge power electronics demand, specifically related to power conversion. My senior project is a design of a buck converter which steps down the voltage from photovoltaic cells ranging from 5 to 40V to a rechargeable battery with 5V. This converter has a high enough power efficiency to effectively convert the energy harnessed from PV panels

Dual-frequency dual-inductor multiple-outputs (DF-DIMO) buck converter topologies with fully-integrated output filters

In multi-core DSPs, there is a need for multiple independent power supplies to power the digital cores. Each power supply needs to have fast dynamic response and must support a wide range of output voltage with up to hundreds of mA load current. In this dissertation, the key performance metrics in power converter design are introduced, the advantages and dis-advantages of the conventional power converter topology are analyzed and a new Dual-Frequency Dual-Inductor Multiple-Output (DF-DIMO) buck converter topology is presented to improve the limitations of the conventional topologies. The proposed topology employs a dual-phase 20-MHz current-mode-controlled input stage to reduce the inductance required per phase to only 200 nH, and a 4-output 100-MHz comparator-controlled fully-integrated output stage to reduce the capacitance required per output to 10 nF. To enable each output to handle up to 250-mA load with less than 40-mV voltage ripple, a 3rd-order bond-wire-based notch filter is employed at each output for voltage ripple suppression. Additionally, the proposed design employs dynamic output re-ordering to enhance dynamic and cross-regulation performance, interleaved pulse-skipping to enhance light-load efficiency, and high-gain local output feedback to enhance DC load Regulation. Targeting multi-core DSPs, the proposed design is implemented in standard 65-nm CMOS technology with 1.8-V input, and outputs in the range of 0.6–1.2 V with a total load of 1 A. It achieves a peak efficiency of 74%, less than 40-mV output voltage ripple, 0.5-V/70-ns Dynamic Voltage Scaling (DVS), and settling time of less than 85 ns for 125-mA all with no cross regulations

Gallium Nitride Converters for Spacecraft Applications

This work presents the development and evaluation of several Point-of-Load (PoL) Gallium Nitride (GaN) high electron mobility transistors (HEMTs) based synchronous buck converters for computational loads in small spacecraft applications. Design modifications to existing controllers and PCB layout is discussed to maximize the benefits of GaN for these converters. The radiation performance of these converters and in-situ measurements is presented. This work also presents the development of a modular power system architecture for 1U CubeSat compute boards including the electrical and grounding layout, mechanical interface, and size layout. The PoL converter is based on the synchronous buck topology utilizing the Linear Technologies LTC3833 and the Texas Instruments LM25141-Q1 controllers and the EPC 2014C, EPC 2015C, Teledyne TDG100E15B, and GaN Systems GS61004B GaN HEMTs. GaN devices are not only attractive to power electronics engineers in general due to their wide bandgap, low gate capacitance, and low on resistance they also show very promising performance in high radiation environments without the need for expensive radiation-hardened design. Several converters utilizing both commercial-off-the-shelf products and radiation hardened devices were developed and compared to the GaN converters to allow for a comparison between all devices to evaluate the performance of these new devices

Design techniques for high efficiency LED drivers

The increasing popularity of cellular phones with integrated cameras in the recent past has led to major improvements in its image quality. However, integration of new features, such as mobile email, video streaming, MP3 etc. tend to put the limitation on image quality as camera phone designers struggle to manage multiple features while maintaining healthy battery life time. In this research, a novel efficient power management scheme for camera phones with flash for better image/video quality is discussed. A prototype power management circuit comprising of a 2 MHz Buck-and-Boost DC-DC converter driving up to 1.2A flash light emitting diode (LED) in 500nm CMOS process is implemented. The converter achieves high efficiency over the entire Li-On battery voltage range of 3.0V to 5.2V by operating in buck, buck-and-boost and boost mode based on the input/output voltage and load current requirements. The proposed pulse width modulator (PWM) controller operates continuously over the entire Li-On battery range while providing constant LED current. The converter shows peak efficiencies of 87% and 83% for LED current of 0.6A and 1.2A, respectively