Survey on individual components for a 5 GHz receiver system using 130 nm CMOS technology

La intención de esta tesis es recopilar información desde un punto de vista general sobre los diferentes tipos de componentes utilizados en un receptor de señales a 5 GHz utilizando tecnología CMOS. Se ha realizado una descripción y análisis de cada uno de los componentes que forman el sistema, destacando diferentes tipos de configuraciones, figuras de mérito y otros parámetros. Se muestra una tabla resumen al final de cada sección, comparando algunos diseños que se han ido presentando a lo largo de los años en conferencias internacionales de la IEEE.The intention of this thesis is to gather information from an overview point about the different types of components used in a 5 GHz receiver using CMOS technology. A review of each of the components that form the system has been made, highlighting different types of configurations, figure of merits and parameters. A summary table is shown at the end of each section, comparing many designs that have been presented over the years at international conferences of the IEEE.Departamento de Ingeniería Energética y FluidomecánicaGrado en Ingeniería en Electrónica Industrial y Automátic

Mixed Linearity Improvement Techniques for Ultra-wideband Low Noise Amplifier

We present the linearization of an ultra-wideband low noise amplifier (UWB-LNA) operating from 2GHz to 11GHz through combining two linearization methods. The used linearization techniques are the combination of post-distortion cancellation and derivative-superposition linearization methods. The linearized UWB-LNA shows an improved linearity (IIP3) of +12dBm, a minimum noise figure (NFmin.) of 3.6dB, input and output insertion losses (S11 and S22)  below -9dB over the entire working bandwidth, midband gain of 6dB at 5.8GHz, and overall circuit power consumption of 24mW supplied from a 1.5V voltage source. Both UWB-LNA and linearized UWB-LNA designs are verified and simulated with ADS2016.01 software using BSIM3v3 TSMC 180nm CMOS model files. In addition, the linearized UWB-LNA performance is compared with other recent state-of-the-art LNAs

CMOS radio frequency circuits for short-range direct-conversion receivers

The research described in this thesis is focused on the design and implementation of radio frequency (RF) circuits for direct-conversion receivers. The main interest is in RF front-end circuits, which contain low-noise amplifiers, downconversion mixers, and quadrature local oscillator signal generation circuits. Three RF front-end circuits were fabricated in a short-channel CMOS process and experimental results are presented. A low-noise amplifier (LNA) is typically the first amplifying block in the receiver. A large number of LNAs have been reported in the literature. In this thesis, wideband LNA structures are of particular interest. The most common and relevant LNA topologies are analyzed in detail in the frequency domain and theoretical limitations are found. New LNA structures are presented and a comparison to the ones found in the literature is made. In this work, LNAs are implemented with downconversion mixers as RF front-ends. The designed mixers are based on the commonly used Gilbert cell. Different mixer implementation alternatives are presented and the design of the interface between the LNA and the downconversion mixer is discussed. In this work, the quadrature local oscillator signal is generated either by using frequency dividers or polyphase filters (PPF). Different possibilities for implementing frequency dividers are briefly described. Polyphase filters were already introduced by the 1970s and integrated circuit (IC) realizations to generate quadrature signals have been published since the mid-1990s. Although several publications where the performance of the PPFs has been studied either by theoretical calculations or simulations can be found in the literature, none of them covers all the relevant design parameters. In this thesis, the theory behind the PPFs is developed such that all the relevant design parameters needed in the practical circuit design have been calculated and presented with closed-form equations whenever possible. Although the main focus was on twoand three-stage PPFs, which are the most common ones encountered in practical ICs, the presented calculation methods can be extended to analyze the performance of multistage PPFs as well. The main application targets of the circuits presented in this thesis are the short-range wireless sensor system and ultrawideband (UWB). Sensors are capable of monitoring temperature, pressure, humidity, or acceleration, for example. The amount of transferred data is typically small and therefore a modest bit rate, less than 1 Mbps, is adequate. The sensor system applied in this thesis operates at 2.4-GHz ISM band (Industrial, Scientific, and Medical). Since the sensors must be able to operate independently for several years, extremely low power consumption is required. In sensor radios, the receiver current consumption is dominated by the blocks and elements operating at the RF. Therefore, the target was to develop circuits that can offer satisfactory performance with a current consumption level that is small compared to other receivers targeted for common cellular systems. On the other hand, there is a growing need for applications that can offer an extremely high data rate. UWB is one example of such a system. At the moment, it can offer data rates of up to 480 Mbps. There is a frequency spectrum allocated for UWB systems between 3.1 and 10.6 GHz. The UWB band is further divided into several narrower band groups (BG), each occupying a bandwidth of approximately 1.6 GHz. In this work, a direct-conversion RF front-end is designed for a dual-band UWB receiver, which operates in band groups BG1 and BG3, i.e. at 3.1 – 4.8 GHz and 6.3 – 7.9 GHz frequency areas, respectively. Clearly, an extremely wide bandwidth combined with a high operational frequency poses challenges for circuit design. The operational bandwidths and the interfaces between the circuit blocks need to be optimized to cover the wanted frequency areas. In addition, the wideband functionality should be achieved without using a number of on-chip inductors in order to minimize the die area, and yet the power consumption should be kept as small as possible. The characteristics of the two main target applications are quite different from each other with regard to power consumption, bandwidth, and operational frequency requirements. A common factor for both is their short, i.e. less than 10 meters, range. Although the circuits presented in this thesis are targeted on the two main applications mentioned above, they can be utilized in other kind of wireless communication systems as well. The performance of three experimental circuits was verified with measurements and the results are presented in this work. Two of them have been a part of a whole receiver including baseband amplifiers and filters and analog-to-digital converters. Experimental circuits were fabricated in a 0.13-µm CMOS process. In addition, this thesis includes design examples where new circuit ideas and implementation possibilities are introduced by using 0.13-µm and 65-nm CMOS processes. Furthermore, part of the theory presented in this thesis is validated with design examples in which actual IC component models are used.Tässä väitöskirjassa esitetty tutkimus keskittyy suoramuunnosvastaanottimen radiotaajuudella (radio frequency, RF) toimivien piirien suunnitteluun ja toteuttamiseen. Työ keskittyy vähäkohinaiseen vahvistimeen (low-noise amplifier, LNA), alassekoittajaan ja kvadratuurisen paikallisoskillaattorisignaalin tuottavaan piiriin. Työssä toteutettiin kolme RF-etupäätä erittäin kapean viivanleveyden CMOS-prosessilla, ja niiden kokeelliset tulokset esitetään. Vähäkohinainen vahvistin on yleensä ensimmäinen vahvistava lohko vastaanottimessa. Useita erilaisia vähäkohinaisia vahvistimia on esitetty kirjallisuudessa. Tämän työn kohteena ovat eritoten laajakaistaiset LNA-rakenteet. Tässä työssä analysoidaan taajuustasossa yleisimmät ja oleellisimmat LNA-topologiat. Lisäksi uusia LNA-rakenteita on esitetty tässä työssä ja niitä on verrattu muihin kirjallisuudessa esitettyihin piireihin. Tässä työssä LNA:t on toteutettu yhdessä alassekoittimen kanssa muodostaen RF-etupään. Työssä suunnitellut alassekoittimet perustuvat yleisesti käytettyyn Gilbertin soluun. Erilaisia sekoittajan suunnitteluvaihtoehtoja ja LNA:n ja alassekoittimen välisen rajapinnan toteutustapoja on esitetty. Tässä työssä kvadratuurinen paikallisoskillaattorisignaali on muodostettu joko käyttämällä taajuusjakajia tai monivaihesuodattimia. Erilaisia taajuusjakajia ja niiden toteutustapoja käsitellään yleisellä tasolla. Monivaihesuodatinta, joka on alunperin kehitetty jo 1970-luvulla, on käytetty integroiduissa piireissä kvadratuurisignaalin tuottamiseen 1990-luvun puolivälistä lähtien. Kirjallisuudesta löytyy lukuisia artikkeleita, joissa monivaihesuodattimen toimintaa on käsitelty teoreettisesti laskien ja simuloinnein. Kuitenkaan kaikkia sen suunnitteluparametreja ei tähän mennessä ole käsitelty. Tässä työssä monivaihesuodattimen teoriaa on kehitetty edelleen siten, että käytännön piirisuunnittelussa tarvittavat oleelliset parametrit on analysoitu ja suunnitteluyhtälöt on esitetty suljetussa muodossa aina kuin mahdollista. Vaikka työssä on keskitytty yleisimpiin eli kaksi- ja kolmiasteisiin monivaihesuodattimiin, on työssä esitetty menetelmät, joilla laskentaa voidaan jatkaa aina useampiasteisiin suodattimiin asti. Työssä esiteltyjen piirien pääkohteina ovat lyhyen kantaman sensoriradio ja erittäin laajakaistainen järjestelmä (ultrawideband, UWB). Sensoreilla voidaan tarkkailla esimerkiksi ympäristön lämpötilaa, kosteutta, painetta tai kiihtyvyyttä. Siirrettävän tiedon määrä on tyypillisesti vähäistä, jolloin pieni tiedonsiirtonopeus, alle 1 megabitti sekunnissa, on välttävä. Tämän työn kohteena oleva sensoriradiojärjestelmä toimii kapealla kaistalla 2,4 gigahertsin ISM-taajuusalueella (Industrial, Scientific, and Medical). Koska sensorien tavoitteena on toimia itsenäisesti ilman pariston vaihtoa useita vuosia, täytyy niiden kuluttaman virran olla erittäin vähäistä. Sensoriradiossa vastaanottimen tehonkulutuksen kannalta määräävässä asemassa ovat radiotaajuudella toimivat piirit. Tavoitteena oli tutkia ja kehittää piirirakenteita, joilla päästään tyydyttävään suorituskykyyn tehonkulutuksella, joka on vähäinen verrattuna muiden tavallisten langattomien tiedonsiirtojärjestelmien radiovastaanottimiin. Toisaalta viime aikoina on kasvanut tarvetta myös järjestelmille, jotka kykenevät tarjoamaan erittäin korkean tiedonsiirtonopeuden. UWB on esimerkki tällaisesta järjestelmästä. Tällä hetkellä se tarjoaa tiedonsiirtonopeuksia aina 480 megabittiin sekunnissa. UWB:lle on varattu taajuusalueita 3,1 ja 10,6 gigahertsin taajuuksien välillä. Kyseinen kaista on edelleen jaettu pienempiin taajuusryhmiin (band group, BG), joiden kaistanleveys on noin 1,6 gigahertsiä. Tässä työssä on toteutettu RF-etupää radiovastaanottimeen, joka pystyy toimimaan BG1:llä ja BG3:lla eli taajuusalueilla 3,1 - 4,7 GHz ja 6,3 - 7,9 GHz. Erittäin suuri kaistanleveys yhdistettynä korkeaan toimintataajuuteen tekee radiotaajuuspiirien suunnittelusta haasteellista. Piirirakenteiden toimintakaistat ja piirien väliset rajapinnat tulee optimoida riittävän laajoiksi käyttämättä kuitenkaan liian montaa piille integroitua kelaa piirin pinta-alan minimoimiseksi, ja lisäksi piirit tulisi toteuttaa mahdollisimman alhaisella tehonkulutuksella. Työssä esiteltyjen piirien kaksi pääkohdetta ovat hyvin erityyppisiä, mitä tulee tehonkulutus-, kaistanleveys- ja toimintataajuusvaatimuksiin. Yhteistä molemmille on lyhyt, alle 10 metrin kantama. Vaikka tässä työssä esitellyt piirit onkin kohdennettu kahteen pääsovelluskohteeseen, voidaan esitettyjä piirejä käyttää myös muiden tiedonsiirtojärjestelmien piirien suunnitteluun. Tässä työssä esitetään mittaustuloksineen yhteensä kolme kokeellista piiriä yllämainittuihin järjestelmiin. Kaksi ensimmäistä kokeellista piiriä muodostaa kokonaisen radiovastaanottimen yhdessä analogisten kantataajuusosien ja analogia-digitaali-muuntimien kanssa. Esitetyt kokeelliset piirit on toteutettu käyttäen 0,13 µm:n viivanleveyden CMOS-tekniikkaa. Näiden lisäksi työ pitää sisällään piirisuunnitteluesimerkkejä, joissa esitetään ideoita ja mahdollisuuksia käyttäen 0,13 µm:n ja 65 nm:n viivanleveyden omaavia CMOS-tekniikoita. Lisäksi piirisuunnitteluesimerkein havainnollistetaan työssä esitetyn teorian paikkansapitävyyttä käyttämällä oikeita komponenttimalleja.reviewe

HIGH LINEARITY UNIVERSAL LNA DESIGNS FOR NEXT GENERATION WIRELESS APPLICATIONS

Design of the next generation (4G) systems is one of the most active and important area of research and development in wireless communications. The 2G and 3G technologies will still co-exist with the 4G for a certain period of time. Other applications such as wireless LAN (Local Area Network) and RFID are also widely used. As a result, there emerges a trend towards integrating multiple wireless functionalities into a single mobile device. Low noise amplifier (LNA), the most critical component of the receiver front-end, determines the sensitivity and noise figure of the receiver and is indispensable for the complete system. To satisfy the need for higher performance and diversity of wireless communication systems, three LNAs with different structures and techniques are proposed in the thesis based on the 4G applications. The first LNA is designed and optimized specifically for LTE applications, which could be easily added to the existing system to support different standards. In this cascode LNA, the nonlinearity coming from the common source (CS) and common gate (CG) stages are analyzed in detail, and a novel linear structure is proposed to enhance the linearity in a relatively wide bandwidth. The LNA has a bandwidth of 900MHz with the linearity of greater than 7.5dBm at the central frequency of 1.2GHz. Testing results show that the proposed structure effectively increases and maintains linearity of the LNA in a wide bandwidth. However, a broadband LNA that covers multiple frequency ranges appears more attractive due to system simplicity and low cost. The second design, a wideband LNA, is proposed to cover multiple wireless standards, such as LTE, RFID, GSM, and CDMA. A novel input-matching network is proposed to relax the tradeoff among noise figure and bandwidth. A high gain (>10dB) in a wide frequency range (1-3GHz) and a minimum NF of 2.5dB are achieved. The LNA consumes only 7mW on a 1.2V supply. The first and second LNAs are designed mainly for the LTE standard because it is the most widely used standard in the 4G communication systems. However, WiMAX, another 4G standard, is also being widely used in many applications. The third design targets on covering both the LTE and the WiMAX. An improved noise cancelling technique with gain enhancing structure is proposed in this design and the bandwidth is enlarged to 8GHz. In this frequency range, a maximum power gain of 14.5dB and a NF of 2.6-4.3dB are achieved. The core area of this LNA is 0.46x0.67mm2 and it consumes 17mW from a 1.2V supply. The three designs in the thesis work are proposed for the multi-standard applications based on the realization of the 4G technologies. The performance tradeoff among noise, linearity, and broadband impedance matching are explored and three new techniques are proposed for the tradeoff relaxation. The measurement results indicate the techniques effectively extend the bandwidth and suppress the increase of the NF and nonlinearity at high frequencies. The three proposed structures can be easily applied to the wideband and multi-standard LNA design

Ultra-Wideband Transceiver with Error Correction for Cortical Interfaces in NanometerCMOS Process

This dissertation reports a high-speed wideband wireless transmission solution for the tight power constraints of cortical interface application. The proposed system deploysImpulse Radio Ultra-wideband (IR-UWB) technique to achieve very high-rate communication. However, impulse radio signals suffer from significant attenuation within the body,and power limitations force the use of very low-power receiver circuits which introduce additional noise and jitter. Moreover, the coils’ self-resonance has to be suppressed to minimize the pulse distortion and inter-symbol interference, adding significant attenuation. To compensate these losses, an Error correction code (ECC) layer is added for functioning reliably to the system. The performance evaluation is made by modeling a pair of physically fabricated coils, and the results show that the ECC is essential to obtain the system’s reliability. Furthermore, the gm/ID methodology, which is based on the complete exploration ofall inversion regions that the transistors are biased, is studied and explored for optimizingthe system at the circuit-level. Specific focuses are on the RF blocks: the low noise am-plifier (LNA) and the injection-locked voltage controlled oscillator (IL-VCO). Through the analytical deduction of the circuit’s features as the function of the gm/ID for each transistor, it is possible to select the optimum operating region for the circuit to achieve the target specification. Other circuit blocks, including the phase shifter, frequency divider,mixer, etc. are also described and analyzed. The prototype is fabricated in a 65-nm CMOS(Complementary Metal-Oxide-Semiconductor) process

A new design of ultra-wideband low noise amplifier in CMOS technology

Nisko-šumni pojačavač (NŠP) nalazi se u prijemnom delu bežičnog primopredajnika neposredno nakon antene. NJegova uloga je da ulazni signal određene frekvencije i male snage izdvoji i pojača iznad nivoa šuma prijemnika. U okviru doktorske disertacije prikazane su i opisane metode za projektovanje širokopojasnih (UWB) NŠP u CMOS tehnologiji. Ukupno je predloženo devet novih konfiguracija NŠP. Na osnovu dobijenih rezultata, u 0,18 μm UMC CMOS tehnologiji realizovan je i fabrikovan NŠP jednostavne topologije, koja predstavlja zbir dva pristupa, pojačavačkog stepena kaskodne strukture sa povratnom spregom i stepena sa višestrukim iskorišćenjem struje. NŠP je projektovan za frekvencijski opseg od 3,1 do 5 GHz. Takođe, opisana je metoda za merenje parametara NŠP, a zatim je i izvršena njegova karakterizacija.In the transceiver chain the low noise amplifier (LNA) is placed in the frontend of the receiver after the antenna. The LNA needs to isolate and amplify received weak signal at a specific frequency above the noise level of the receiver. In the scope of this doctoral dissertation methods for designing ultra-wideband (UWB) LNA in CMOS technology are presented and described. Nine new LNA configurations were proposed. Based on the obtained results, simple LNA configuration, obtained by merging casode feedback topology and current-reuse technique, was realized and fabricated in 0.18 μm UMC CMOS technology. The LNA is designed for the frequency band from 3.1 to 5 GHz. In addition, the method for measurement LNA parameters is described and the proposed LNA was characterized

Simulation and Design of an UWB Imaging System for Breast Cancer Detection

Breast cancer is the most frequently diagnosed cancer among women. In recent years, the mortality rate due to this disease is greatly decreased thanks to both enormous progress in cancer research, and screening campaigns which have allowed the increase in the number of early diagnoses of the disease. In fact, if the tumor is identied in its early stage, e.g. when it has a diameter of less than one centimeter, the possibility of a cure can reach 93%. However, statistics show that more young aged women are suered breast cancer. The goal of screening exams for early breast cancer detection is to nd cancers before they start to cause symptoms. Regular mass screening of all women at risk is a good option to achieve that. Instead of meeting very high diagnostic standards, it is expected to yield an early warning, not a denitive diagnosis. In the last decades, X-ray mammography is the most ecient screening technique. However, it uses ionizing radiation and, therefore, should not be used for frequent check-ups. Besides, it requires signicant breast compression, which is often painful. In this scenario many alternative technologies were developed to overcome the limitations of mammography. Among these possibilities, Magnetic Resonance Imaging (MRI) is too expensive and time-consuming, Ultrasound is considered to be too operatordependent and low specicity, which are not suitable for mass screening. Microwave imaging techniques, especially Ultra WideBand (UWB) radar imaging, is the most interesting one. The reason of this interest relies on the fact that microwaves are non-ionizing thus permitting frequent examinations. Moreover, it is potentially lowcost and more ecient for young women. Since it has been demonstrated in the literatures that the dielectric constants between cancerous and healthy tissues are quite dierent, the technique consists in illuminating these biological tissues with microwave radiations by one or more antennas and analyzing the re ected signals. An UWB imaging system consists of transmitters, receivers and antennas for the RF part, the transmission channel and of a digital backend imaging unit for processing the received signals. When an UWB pulse strikes the breast, the pulse is re ected due to the dielectric discontinuity in tissues, the bigger the dierence, the bigger the backscatter. The re ected signals are acquired and processed to create the energy maps. This thesis aims to develop an UWB system at high resolution for the detection of carcinoma breast already in its initial phase. To favor the adoption of this method in screening campaigns, it is necessary to replace the expensive and bulky RF instrumentation used so far with ad-hoc designed circuits and systems. In order to realize that, at the very beginning, the overall system environment must be built and veried, which mainly consists of the transmission channel{the breast model and the imaging unit. The used transmission channel data come from MRI of the prone patient. In order to correctly use this numerical model, a simulator was built, which was implemented in Matlab, according to the Finite-Dierence-Time- Domain (FDTD) method. FDTD algorithm solves the electric and magnetic eld both in time and in space, thus, simulates the propagation of electromagnetic waves in the breast model. To better understand the eect of the system non-idealities, two 2D breast models are investigated, one is homogeneous, the other is heterogeneous. Moreover, the modeling takes into account all critical aspects, including stability and medium dispersion. Given the types of tissues under examination, the frequency dependence of tissue dielectric properties is incorporated into wideband FDTD simulations using Debye dispersion parameters. A performed further study is in the implementation of the boundary conditions. The Convolution Perfectly Matched Layer (CPML) is used to implement the absorbing boundaries. The objective of the imaging unit is to obtain an energy map representing the amount of energy re ected from each point of the breast, by recombining the sampled backscattered signals. For this purpose, the study has been carried out on various beamforming in the literature. The basic idea is called as "delay and sum", which is to align the received signals in such a way as to focus a given point in space and then add up all the contributions, so as to obtain a constructive interference at that point if this is a diseased tissue. In this work, Microwave Imaging via Space Time (MIST) Beamforming algorithm is applied, which is based on the above principle and add more elaborations of the signals in order to make the algorithm less sensitive to propagation phenomena in the medium and to the non-idealities of the system. It is divided into two distinct steps: the rst step, called SKin Artifact Removal (SKAR), takes care of removing the contributions from the signal caused by the direct path between the transmitter and receiver, the re ection of skin, as they are orders of magnitude higher compared to the re ections caused by cancers; the second step, which is BEAmForming (BEAF), performs the algorithm of reconstruction by forming a weighted combination of time delayed version of the calibrated re ected signals. As discussed above, more attention must be paid on the implementation of the ad-hoc integration circuits. In this scenario, due to the strict requirements on the RF receiver component, two dierent approaches of the implementation of the RF front-end, Direct Conversion (DC) receiver and Coherent Equivalent Time Sampling (CETS) receiver are compared. They are modeled behaviorally and the eects of various impairments, such as thermal, jitter, and phase noise, as well as phase inaccuracies, non-linearity, ADC quantization noise and distortion, on energy maps and on quantitative metrics such as SCR and SMR are evaluated. Dierential Gaussian pulse is chosen as the exciting source. Results show that DC receiver performs higher sensitivity to phase inaccuracies, which makes it less robust than the CETS receiver. Another advantage of the CETS receiver is that it can work in time domain with UWB pulses, other than in frequency domain with stepped frequency continuous waves like the DC one, which reduces the acquisition time without impacting the performance. Based on the results of the behavioral simulations, low noise amplier (LNA) and Track and Hold Amplier (THA) can be regarded as the most critical parts for the proposed CETS receiver, as well as the UWB antenna. This work therefore focuses on their hardware implementations. The LNA, which shows critical performance limitation at bandwidth and noise gure of receiver, has been developed based on common-gate conguration. And the THA based on Switched Source Follower (SSF) scheme has been presented and improved to obtain high input bandwidth, high sampling rate, high linearity and low power consumption. LNA and THA are implemented in CMOS 130nm technology and the circuit performance evaluation has been taken place separately and together. The small size UWB wide-slot antenna is designed and simulated in HFSS. Finally, in order to evaluate the eect of the implemented transistor level components on system performance, a multi-resolution top-down system methodology is applied. Therfore, the entire ow is analyzed for dierent levels of the RF frontend. Initially the system components are described behaviorally as ideal elements. The main activity consists in the analysis and development of the entire frontend system, observing and complementing each other blocks in a single ow simulation, clear and well-dened in its various interfaces. To achieve that the receiver is modeled and analyzed using VHDL-AMS language block by block, moreover, the impact of quantization, noise, jitter, and non-linearity is also evaluated. At last, the behavioral description of antenna, LNA and THA is replaced with a circuit-level one without changing the rest of the system, which permits a system-level assessment of low-level issues

High Performance RF and Basdband Analog-to-Digital Interface for Multi-standard/Wideband Applications

The prevalence of wireless standards and the introduction of dynamic standards/applications, such as software-defined radio, necessitate the next generation wireless devices that integrate multiple standards in a single chip-set to support a variety of services. To reduce the cost and area of such multi-standard handheld devices, reconfigurability is desirable, and the hardware should be shared/reused as much as possible. This research proposes several novel circuit topologies that can meet various specifications with minimum cost, which are suited for multi-standard applications. This doctoral study has two separate contributions: 1. The low noise amplifier (LNA) for the RF front-end; and 2. The analog-to-digital converter (ADC). The first part of this dissertation focuses on LNA noise reduction and linearization techniques where two novel LNAs are designed, taped out, and measured. The first LNA, implemented in TSMC (Taiwan Semiconductor Manufacturing Company) 0.35Cm CMOS (Complementary metal-oxide-semiconductor) process, strategically combined an inductor connected at the gate of the cascode transistor and the capacitive cross-coupling to reduce the noise and nonlinearity contributions of the cascode transistors. The proposed technique reduces LNA NF by 0.35 dB at 2.2 GHz and increases its IIP3 and voltage gain by 2.35 dBm and 2dB respectively, without a compromise on power consumption. The second LNA, implemented in UMC (United Microelectronics Corporation) 0.13Cm CMOS process, features a practical linearization technique for high-frequency wideband applications using an active nonlinear resistor, which obtains a robust linearity improvement over process and temperature variations. The proposed linearization method is experimentally demonstrated to improve the IIP3 by 3.5 to 9 dB over a 2.5–10 GHz frequency range. A comparison of measurement results with the prior published state-of-art Ultra-Wideband (UWB) LNAs shows that the proposed linearized UWB LNA achieves excellent linearity with much less power than previously published works. The second part of this dissertation developed a reconfigurable ADC for multistandard receiver and video processors. Typical ADCs are power optimized for only one operating speed, while a reconfigurable ADC can scale its power at different speeds, enabling minimal power consumption over a broad range of sampling rates. A novel ADC architecture is proposed for programming the sampling rate with constant biasing current and single clock. The ADC was designed and fabricated using UMC 90nm CMOS process and featured good power scalability and simplified system design. The programmable speed range covers all the video formats and most of the wireless communication standards, while achieving comparable Figure-of-Merit with customized ADCs at each performance node. Since bias current is kept constant, the reconfigurable ADC is more robust and reliable than the previous published works

PASSIVE RF CIRCUITS FOR SIMULTANEOUS TRANSMIT AND RECEIVE AND IMPACT ANALYSIS OF RECONFIGURABLE WIDEBAND RF ELECTRONICS ON COMMUNICATIONS SYSTEM OPERATIONS

Consumer based wireless systems currently operate with a split spectrum approach. However, in order to accommodate the increased demand for high datarate services within fixed spectrum allocations a new architecture will be required. The ability to simultaneously transmit and receive data within the full spectrum allocation can alleviate this problem. Simultaneous transmission and reception within current spectrum limits could effectively double data rates. However, physical limitations on radio frequency circuits including reflections and mutual coupling currently limit the capability of systems to operate in this mode. Therefore, radio frequency circuits that cancel this self-interference must be introduced. This thesis describes the development of a self-interference cancellation circuit for simultaneous transmit and receive. The design operates by combining an out of phase signal of equal magnitude with the original self-interference signal. Design methodology for the required radio frequency circuitry, including antenna elements, directional couplers, and hairpin resonators is provided. A characterization method for determining the antenna mutual coupling and phase characteristics is implemented in commercial computer aided design software. Both a hairpin resonator and a delay line are used to match the phase and magnitude characteristics of the antenna mutual coupling. Directional couplers are designed to provide the required anti-phasing of the signal and couple the required power level from the transmit path, through the phasing element, to the receive path. The devices are fabricated on high frequency printed circuit board materials and measured. The theory of operation for a T-junction exponential power divider used in an early version of the circuit is also presented. Measured results of the self-interference cancellation circuit agree well with simulation. Future RF systems are being designed with a desire for both simultaneous transmit and receive capability and wideband operation. However, due to the nature of wideband devices, they are susceptible to out-of-band interference degrading system level performance. With this in mind, a system level analysis of a wideband low noise amplifier with both adaptive and controllable biasing current is performed. Based on a quadrature phase shift keyed communications system, simulation and measurements fundamental to the operation of such wideband devices are conducted. This analysis shows the dependence of in-band performance on power received from out-of-band interfering signals. It is shown that the out-of-band noise sources contribute to increased error vector magnitude in the receiver due to gain compression

CMOS design enhancement techniques for RF receivers. Analysis, design and implementation of RF receivers with component enhancement and component reduction for improved sensitivity and reduced cost, using CMOS technology.

Silicon CMOS Technology is now the preferred process for low power wireless communication devices, although currently much noisier and slower than comparable processes such as SiGe Bipolar and GaAs technologies. However, due to ever-reducing gate sizes and correspondingly higher speeds, higher Ft CMOS processes are increasingly competitive, especially in low power wireless systems such as Bluetooth, Wireless USB, Wimax, Zigbee and W-CDMA transceivers. With the current 32 nm gate sized devices, speeds of 100 GHz and beyond are well within the horizon for CMOS technology, but at a reduced operational voltage, even with thicker gate oxides as compensation. This thesis investigates newer techniques, both from a systems point of view and at a circuit level, to implement an efficient transceiver design that will produce a more sensitive receiver, overcoming the noise disadvantage of using CMOS Silicon. As a starting point, the overall components and available SoC were investigated, together with their architecture. Two novel techniques were developed during this investigation. The first was a high compression point LNA design giving a lower overall systems noise figure for the receiver. The second was an innovative means of matching circuits with low Q components, which enabled the use of smaller inductors and reduced the attenuation loss of the components, the resulting smaller circuit die size leading to smaller and lower cost commercial radio equipment. Both these techniques have had patents filed by the University. Finally, the overall design was laid out for fabrication, taking into account package constraints and bond-wire effects and other parasitic EMC effects