Wideband CMOS Data Converters for Linear and Efficient mmWave Transmitters

With continuously increasing demands for wireless connectivity, higher\ua0carrier frequencies and wider bandwidths are explored. To overcome a limited transmit power at these higher carrier frequencies, multiple\ua0input multiple output (MIMO) systems, with a large number of transmitters\ua0and antennas, are used to direct the transmitted power towards\ua0the user. With a large transmitter count, each individual transmitter\ua0needs to be small and allow for tight integration with digital circuits. In\ua0addition, modern communication standards require linear transmitters,\ua0making linearity an important factor in the transmitter design.In this thesis, radio frequency digital-to-analog converter (RF-DAC)-based transmitters are explored. They shift the transition from digital\ua0to analog closer to the antennas, performing both digital-to-analog\ua0conversion and up-conversion in a single block. To reduce the need for\ua0computationally costly digital predistortion (DPD), a linear and wellbehaved\ua0RF-DAC transfer characteristic is desirable. The combination\ua0of non-overlapping local oscillator (LO) signals and an expanding segmented\ua0non-linear RF-DAC scaling is evaluated as a way to linearize\ua0the transmitter. This linearization concept has been studied both for\ua0the linearization of the RF-DAC itself and for the joint linearization of\ua0the cascaded RF-DAC-based modulator and power amplifier (PA) combination.\ua0To adapt the linearization, observation receivers are needed.\ua0In these, high-speed analog-to-digital converters (ADCs) have a central\ua0role. A high-speed ADC has been designed and evaluated to understand\ua0how concepts used to increase the sample rate affect the dynamic performance

Multi-gigabit CMOS analog-to-digital converter and mixed-signal demodulator for low-power millimeter-wave communication systems

The objective of the research is to develop high-speed ADCs and mixed-signal demodulator for multi-gigabit communication systems using millimeter-wave frequency bands in standard CMOS technology. With rapid advancements in semiconductor technologies, mobile communication devices have become more versatile, portable, and inexpensive over the last few decades. However, plagued by the short lifetime of batteries, low power consumption has become an extremely important specification in developing mobile communication devices. The ever-expanding demand of consumers to access and share information ubiquitously at faster speeds requires higher throughputs, increased signal-processing functionalities at lower power and lower costs. In today’s technology, high-speed signal processing and data converters are incorporated in almost all modern multi-gigabit communication systems. They are key enabling technologies for scalable digital design and implementation of baseband signal processors. Ultimately, the merits of a high performance mixed-signal receiver, such as data rate, sensitivity, signal dynamic range, bit-error rate, and power consumption, are directly related to the quality of the embedded ADCs. Therefore, this dissertation focuses on the analysis and design of high-speed ADCs and a novel broadband mixed-signal demodulator with a fully-integrated DSP composed of low-cost CMOS circuitry. The proposed system features a novel dual-mode solution to demodulate multi-gigabit BPSK and ASK signals. This approach reduces the resolution requirement of high-speed ADCs, while dramatically reducing its power consumption for multi-gigabit wireless communication systems.PhDGee-Kung Chang - Committee Chair; Chang-Ho Lee - Committee Member; Geoffrey Ye Li - Committee Member; Paul A. Kohl - Committee Member; Shyh-Chiang Shen - Committee Membe

Circuit techniques for low-voltage and high-speed A/D converters

The increasing digitalization in all spheres of electronics applications, from telecommunications systems to consumer electronics appliances, requires analog-to-digital converters (ADCs) with a higher sampling rate, higher resolution, and lower power consumption. The evolution of integrated circuit technologies partially helps in meeting these requirements by providing faster devices and allowing for the realization of more complex functions in a given silicon area, but simultaneously it brings new challenges, the most important of which is the decreasing supply voltage. Based on the switched capacitor (SC) technique, the pipelined architecture has most successfully exploited the features of CMOS technology in realizing high-speed high-resolution ADCs. An analysis of the effects of the supply voltage and technology scaling on SC circuits is carried out, and it shows that benefits can be expected at least for the next few technology generations. The operational amplifier is a central building block in SC circuits, and thus a comparison of the topologies and their low voltage capabilities is presented. It is well-known that the SC technique in its standard form is not suitable for very low supply voltages, mainly because of insufficient switch control voltage. Two low-voltage modifications are investigated: switch bootstrapping and the switched opamp (SO) technique. Improved circuit structures are proposed for both. Two ADC prototypes using the SO technique are presented, while bootstrapped switches are utilized in three other prototypes. An integral part of an ADC is the front-end sample-and-hold (S/H) circuit. At high signal frequencies its linearity is predominantly determined by the switches utilized. A review of S/H architectures is presented, and switch linearization by means of bootstrapping is studied and applied to two of the prototypes. Another important parameter is sampling clock jitter, which is analyzed and then minimized with carefully-designed clock generation and buffering. The throughput of ADCs can be increased by using parallelism. This is demonstrated on the circuit level with the double-sampling technique, which is applied to S/H circuits and a pipelined ADC. An analysis of nonidealities in double-sampling is presented. At the system level parallelism is utilized in a time-interleaved ADC. The mismatch of parallel signal paths produces errors, for the elimination of which a timing skew insensitive sampling circuit and a digital offset calibration are developed. A total of seven prototypes are presented: two double-sampled S/H circuits, a time-interleaved ADC, an IF-sampling self-calibrated pipelined ADC, a current steering DAC with a deglitcher, and two pipelined ADCs employing the SO technique.reviewe

Smart attitude control system for small satellites

The attitude control system is one of the most important systems for satellites, which is essential for the satellite's detumbling, pointing, and orbital maneuver. The conventional attitude control system consists of magnetorquers, reaction wheels, and thrusters. Among these actuators, magnetorquers are widely used for satellite detumbling and attitude control, especially for small satellites and CubeSats. It consumes zero propellant compared with thrusters and has a high chance of survival compared with the reaction wheel as it does not contain any moving parts, which makes them last longer in harsh environments. Conventional magnetorquers utilize air or soft magnetic materials, e.g., iron and alloys, as core, and the magnetic field is generated by feeding the electric current to the wrapped solenoid. Due to the power limit of the small satellites, the magnetic field strength is strictly limited, and the continuous current supply results in massive energy consumption for detumbling and other attitude adjustment missions. The long copper wire of the solenoid will also result in high resistance and generate significant heat. To improve the current design and overcome the proposed drawbacks, a novel electro-permanent magnetorquer has been designed and developed in this thesis as one actuator of the attitude control system. Unlike conventional magnetorquers, the electro-permanent magnetorquer utilizes hard magnetic materials as the core, which can maintain the magnetization when the external magnetic field is removed, to generate the required magnetic field. A special driving circuit is designed to generate the desired dipole moment for the magnetorquer, and the components used for the circuit are carefully selected. The experiments show that the electro-permanent magnetorquer can generate 1.287 Am2 dipole moment in either direction. The magnetorquer works in pulse mode to adjust the dipole moment, and it requires around 0.75 J energy maximum per pulse. A single-axis detumbling experiment has been conducted using only one torque rod on the air-bearing table inside an in-house manufactured Helmholtz cage. The experiment results show that the magnetorquer can detumble the air bearing table with 0.0612 kgm2 moment of inertia from an initial speed of around 27°/s to zero within 800s, and total energy of 82.92 J was consumed for the detumbling experiment. A single torque rod single-axis pointing experiment has been conducted with a sliding mode controller on the same platform. The results show that a single torque rod can achieve the target angle and maintain the error discrepancy within the ±0.4° boundary under a specific system configuration. A micro air-fed magnetoplasmadynamic thruster has been designed and tested as another attitude control system actuator. The thruster is a miniaturized electric propulsion system based on the conventional full-scale magnetoplasmadynamic thruster that operates at hundreds of kilowatts. The thruster is designed and tested using normal air as the propellant under the pulse operation mode on a calibrated micro-force measurement thruster stand. The experiments revealed that the thruster could generate a 34.534 µNs impulse bit with an average power input of 1.857 ± 0.0679 W and thrust to power ratio of 8.266 µN/W. The specific impulse is calculated to be 2319 s with a thruster efficiency of 9.402%, which is quite competitive compared with other solid-state and liquid-fed pulse-mode thrusters. This paper presents the design and test results for the thruster under a low power level, as well as an analysis of its problems and limitations with corresponding future research and optimization directions noted at the end. The electro-permanent magnetorquer as a payload of the CUAVA-2 satellite mission has been introduced in this thesis. The design considerations and adjustment based on the requirement of the CUAVA-2 has been introduced in detail. A simple sliding mode controller has been developed to achieve three-axis attitude control using both electro-permanent magnetorquer and the micro air-fed magnetoplasmadynamic thruster. The controller's performance has been tested using MATLAB-based simulation with the experimentally obtained performance parameters and some assumptions. The results show that the smart attitude control system can achieve ±0.005° pointing error discrepancy with the help of both actuators

The Fifth NASA Symposium on VLSI Design

The fifth annual NASA Symposium on VLSI Design had 13 sessions including Radiation Effects, Architectures, Mixed Signal, Design Techniques, Fault Testing, Synthesis, Signal Processing, and other Featured Presentations. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The presentations share insights into next generation advances that will serve as a basis for future VLSI design

Doppler Encoded Excitation Patterning (DEEP) Microscopy

Traditional optical imaging systems rely on lenses and spatially-resolved detection to probe distinct locations on the object. We develop a novel computational approach to 2D and 3D imaging that instead measures the object\u27s spatial Fourier transform using a single-element detector and without requiring precision optics. This wide-field technique can be used to image biological and synthetic structures in fluoresced or scattered light using coherent or broadband illumination. It employs dynamic structured illumination, acousto-optics, RF electronics, and tomographic algorithms to circumvent several trade-offs in conventional imaging, such as the dependence of the optical transfer function on the imaging lenses and the coupling of resolution and depth of field. We use Fourier optics concepts to derive the dynamic optical transfer function, evaluate different Fourier sampling strategies, and investigate and compare tomographic algorithms for 2D and 3D image synthesis. We also develop conceptual and analytical models to describe imaging of fluorescent as well as amplitude and phase scattering objects, the effects of broadband and spatially-incoherent illumination, and nonlinear wide-field super-resolution imaging. We consider sources of noise, analyze and simulate SNR behavior for several types of noise and Fourier sampling strategies, and compare the sensitivity of the technique to conventional imaging. We describe several experimental proof-of-concept systems and present two-dimensional high-resolution tomographic image reconstructions in both scattered and fluoresced light demonstrating a thousandfold improvement in the depth of field compared to conventional lens-based microscopy. Finally, we explore approaches for high-speed Fourier sampling and propose several related sensing techniques, including wide-field fluorescence imaging in scattering media

CEPC Technical Design Report -- Accelerator (v2)

The Circular Electron Positron Collider (CEPC) is a large scientific project initiated and hosted by China, fostered through extensive collaboration with international partners. The complex comprises four accelerators: a 30 GeV Linac, a 1.1 GeV Damping Ring, a Booster capable of achieving energies up to 180 GeV, and a Collider operating at varying energy modes (Z, W, H, and ttbar). The Linac and Damping Ring are situated on the surface, while the Booster and Collider are housed in a 100 km circumference underground tunnel, strategically accommodating future expansion with provisions for a Super Proton Proton Collider (SPPC). The CEPC primarily serves as a Higgs factory. In its baseline design with synchrotron radiation (SR) power of 30 MW per beam, it can achieve a luminosity of 5e34 /cm^2/s^1, resulting in an integrated luminosity of 13 /ab for two interaction points over a decade, producing 2.6 million Higgs bosons. Increasing the SR power to 50 MW per beam expands the CEPC's capability to generate 4.3 million Higgs bosons, facilitating precise measurements of Higgs coupling at sub-percent levels, exceeding the precision expected from the HL-LHC by an order of magnitude. This Technical Design Report (TDR) follows the Preliminary Conceptual Design Report (Pre-CDR, 2015) and the Conceptual Design Report (CDR, 2018), comprehensively detailing the machine's layout and performance, physical design and analysis, technical systems design, R&D and prototyping efforts, and associated civil engineering aspects. Additionally, it includes a cost estimate and a preliminary construction timeline, establishing a framework for forthcoming engineering design phase and site selection procedures. Construction is anticipated to begin around 2027-2028, pending government approval, with an estimated duration of 8 years. The commencement of experiments could potentially initiate in the mid-2030s.Comment: 1106 page

ATLAS Levels Up: Early Searches for Diboson Resonances in Semi-Hadronic Decay Channels at √ s = 13 TeV Center of Mass Energy

Searches are made for narrow diboson resonances, ZZ and ZW, in the final states llqq and ννqq at ATLAS, with (13.2±0.4) fb−1data collected from pp-collisions with center of mass energy √ s=13 TeV during 2015 and 2016, the first two years of Run 2 of the Large Hadron Collider. The hadronic decay products of the vector boson, V → qq, are reconstructed as jets in the electromagnetic and hadronic calorimeters. When the vector boson is sufficiently boosted the decay products are reconstructed as a single anti-kt R = 1.0 jet. Otherwise two anti-kt R = 0.4 jets are matched to identify the vector boson. The Z boson in its leptonic decay is identified by either reconstructing two electrons in the calorimeters, or opposite sign muons in the muon spectrometer. Limits on the production cross section for 3 benchmark signals, a heavy scalar, a spin-1 heavy vector triplet, and a spin-2 graviton are set in the mass range 300 GeV to 5000 GeV