Circuits and Systems for On-Chip RF Chemical Sensors and RF FDD Duplexers

Integrating RF bio-chemical sensors and RF duplexers helps to reduce cost and area in the current applications. Furthermore, new applications can exist based on the large scale integration of these crucial blocks. This dissertation addresses the integration of RF bio-chemical sensors and RF duplexers by proposing these initiatives. A low power integrated LC-oscillator-based broadband dielectric spectroscopy (BDS) system is presented. The real relative permittivity ε’r is measured as a shift in the oscillator frequency using an on-chip frequency-to-digital converter (FDC). The imaginary relative permittivity ε”r increases the losses of the oscillator tank which mandates a higher dc biasing current to preserve the same oscillation amplitude. An amplitude-locked loop (ALL) is used to fix the amplitude and linearize the relation between the oscillator bias current and ε”r. The proposed BDS system employs a sensing oscillator and a reference oscillator where correlated double sampling (CDS) is used to mitigate the impact of flicker noise, temperature variations and frequency drifts. A prototype is implemented in 0.18 µm CMOS process with total chip area of 6.24 mm^2 to operate in 1-6 GHz range using three dual bands LC oscillators. The achieved standard deviation in the air is 2.1 ppm for frequency reading and 110 ppm for current reading. A tunable integrated electrical balanced duplexer (EBD) is presented as a compact alternative to multiple bulky SAW and BAW duplexers in 3G/4G cellular transceivers. A balancing network creates a replica of the transmitter signal for cancellation at the input of a single-ended low noise amplifier (LNA) to isolate the receive path from the transmitter. The proposed passive EBD is based on a cross-connected transformer topology without the need of any extra balun at the antenna side. The duplexer achieves around 50 dB TX-RX isolation within 1.6-2.2 GHz range up to 22 dBm. The cascaded noise figure of the duplexer and LNA is 6.5 dB, and TX insertion loss (TXIL) of the duplexer is about 3.2 dB. The duplexer and LNA are implemented in 0.18 µm CMOS process and occupy an active area of 0.35 mm^2

Delta-Sigma Modulator based Compact Sensor Signal Acquisition Front-end System

The proposed delta-sigma modulator ($\Delta\Sigma$M) based signal acquisition architecture uses a differential difference amplifier (DDA) customized for dual purpose roles, namely as instrumentation amplifier and as integrator of $\Delta\Sigma$M. The DDA also provides balanced high input impedance for signal from sensors. Further, programmable input amplification is obtained by adjustment of $\Delta\Sigma$M feedback voltage. Implementation of other functionalities, such as filtering and digitization have also been incorporated. At circuit level, a difference of transconductance of DDA input pairs has been proposed to reduce the effect of input resistor thermal noise of front-end R-C integrator of the $\Delta\Sigma$M. Besides, chopping has been used for minimizing effect of Flicker noise. The resulting architecture is an aggregation of functions of entire signal acquisition system within the single block of $\Delta\Sigma$M, and is useful for a multitude of dc-to-medium frequency sensing and similar applications that require high precision at reduced size and power. An implementation of this in 0.18-$\mu$m CMOS process has been presented, yielding a simulated peak signal-to-noise ratio of 80 dB and dynamic range of 109dBFS in an input signal band of 1 kHz while consuming 100 $\mu$W of power; with the measured signal-to-noise ratio being lower by about 9 dB.Comment: 13 pages, 16 figure

Micropower incremental analog-to-digital converters

Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion—they are easy to multiplex between channels, need simpler digital decimation filter, and allow extended counting with a Nyquist-rate ADC. A single-loop incremental ADC was designed and fabricated in 90 nm for a biosensor interface circuit. It incorporates one integrator, and uses noise-coupling technique to achieve second-order noise-shaping. The use of feed-forward coupling and multi-bit internal quantizer allows low swing at the integrator, and hence low-power operation. The measured SNR is 74 dB within a signal bandwidth 2 kHz, and a 14 μW power consumption. A new two-step IADC was proposed for 250 Hz bandwidth sensor interface circuits. It extends the order of a conventional incremental ADC from N to (2N-1) by way of a two-step operation. However, it only needs the same circuitry as the Nth-order IADC. A second-order loop filter was designed and fabricated by 2.5V I/O devices in 65 nm to demonstrate this concept to achieve third-order noise-shaping performance. Operated at sampling frequency 96 kHz, the measured dynamic range is 99.8 dB relative to a maximum input 2.2 VPP. The measured maximum SNDR was 91 dB with a 2.2 V[subscript PP] input amplitude. The ADC core area is 0.2 mm², and the IADC consumed only 11.7 μW. A new incremental ADC with multi-step extended-counting was proposed for sensor interface conversion. A 1st-order feedforward modulator was used for the coarse conversion, and the residue voltage was quantized by re-using the modulator for the fine conversion. Then, the circuit was re-configured as a counting ADC to quantize the residue voltage. The three steps of the circuits perform 15-bit quantization by 5-bit/step. A first-order IADC could only achieve 6.6-bit performance within the same conversion time of 96 clock periods. Reusing the first-order circuits, extra 8.4-bit is thus achieved

Power Efficient Architectures for High Accuracy Analog-to-Digital Converters

Incremental ADCs (IADCs) have found wide applications in sensor interface circuitry since, compared to ∆Σ ADCs, they provide low-latency high-accuracy conversion and easy multiplexing among multiple channels. On the other hand, continuous-time ∆Σ ADCs (CTDSM) have been receiving more and more attention as a power-efficient solution in targeting medium to high accuracy over wider range of signal bandwidth (tens of MHz). In this dissertation, novel configurations have been explored in both architectures for power-efficient and high-accuracy data conversion. First, a multi-step incremental ADC (IADC) using multi-slope extended counting technique is described. Only one active integrator is used in the three-step conversion cycle. The accuracy of the IADC is extended by having it configured as multi-slope ADCs in two additional steps. The proposed IADC uses the same circuitry as a first-order IADC (IADC1), but it exhibits as good efficiency as its second-order ∆Σ ADC counterpart. For the same accuracy, the conversion cycle is shortened by a factor of more than 2⁹ compared to the IADC1. Fabricated in 0.18-μm CMOS process, the prototype ADC occupies 0.5 mm². With a 642 kHz clock, it achieves SNDR of 52.2 dB in the first step. The SNDR is boosted to 79.8 dB in the second step, and to 96.8 dB in the third step, over a 1 kHz signal band. The power consumption is 35 µW from a 1.5 V power supply. This gives an excellent Schreier FoM of 174.6 dB. Secondly, a multi-step incremental ADC with extended binary counting is proposed. It achieves high accuracy by splitting one conversion cycle into two serial steps. During the first step, the ADC works as a first-order incremental ADC (IADC1). The second step reuses the single integrator and extends the accuracy to 16 bits by a two-capacitor SAR-assisted binary counting technique. For the same accuracy, the conversion cycle is shortened by a factor of more than 2⁸ as compared to the single-step IADC. Fabricated in 0.18-μm CMOS process, the SAR-assisted IADC achieves a peak SNR/SNDR/DR of 97.1/96.6/100.2 dB over a 1.2 kHz bandwidth, while dissipating 33.2 μW from a 1.5 V supply. This gives a Schreier FoM of 175.8 dB and Walden FoM of 0.25 pJ/conv.-step. Finally, the design of a continuous-time ∆Σ modulator (CTDSM) to be used in an ultrasound beamformer for biomedical imaging is described. To achieve better resolution, the prototype modulator operates at 1.2 GHz. It incorporates a digital excess loop delay (ELD) compensation to replace the active adder in front of the internal quantizer. A digitally controlled reference-switching matrix, combined with the data-weighted averaging (DWA) technique, results in a delay-free feedback path. A multi-bit FIR feedback DAC, along with its compensation path, is used to achieve lower clock jitter sensitivity and better loop filter linearity. The modulator achieves 79.4 dB dynamic range, 77.3 dB SNR and 74.3 dB SNDR over a 15 MHz signal bandwidth. Fabricated in a 65 nm CMOS process, the core modulator occupies an area of only 0.16 mm² and dissipates 6.96 mW from a 1 V supply. A 58.6 fJ/conversion-step figure of merit was achieved.Keywords: Incremental ADC, multi-step operation, instrumentation and measurement, sensor interface, analog-to-digital converter, extended counting, chopper stabilization, delta-sigma ADC, multi-slope ADCsKeywords: Incremental ADC, multi-step operation, instrumentation and measurement, sensor interface, analog-to-digital converter, extended counting, chopper stabilization, delta-sigma ADC, multi-slope ADC

Ultra-Wideband Transceiver with Error Correction for Cortical Interfaces in NanometerCMOS Process

This dissertation reports a high-speed wideband wireless transmission solution for the tight power constraints of cortical interface application. The proposed system deploysImpulse Radio Ultra-wideband (IR-UWB) technique to achieve very high-rate communication. However, impulse radio signals suffer from significant attenuation within the body,and power limitations force the use of very low-power receiver circuits which introduce additional noise and jitter. Moreover, the coils’ self-resonance has to be suppressed to minimize the pulse distortion and inter-symbol interference, adding significant attenuation. To compensate these losses, an Error correction code (ECC) layer is added for functioning reliably to the system. The performance evaluation is made by modeling a pair of physically fabricated coils, and the results show that the ECC is essential to obtain the system’s reliability. Furthermore, the gm/ID methodology, which is based on the complete exploration ofall inversion regions that the transistors are biased, is studied and explored for optimizingthe system at the circuit-level. Specific focuses are on the RF blocks: the low noise am-plifier (LNA) and the injection-locked voltage controlled oscillator (IL-VCO). Through the analytical deduction of the circuit’s features as the function of the gm/ID for each transistor, it is possible to select the optimum operating region for the circuit to achieve the target specification. Other circuit blocks, including the phase shifter, frequency divider,mixer, etc. are also described and analyzed. The prototype is fabricated in a 65-nm CMOS(Complementary Metal-Oxide-Semiconductor) process

Improvements to MOS CCD technology for future X-ray astronomy missions

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.This thesis is concerned with the development of MOS charge-coupled device (CCD) technology for future applications in X-ray astronomy. Of particular interest is increased detection efficiency of high energy X-ray photons and increased pixel readout speed for large area sensors. Chapter 2 reviews the generation of X-rays, methods for extra-terrestrial X-ray observations, detectors and provides an overview of X-ray astronomy missions. Chapter 3 discusses the CCD and introduces some of the recent technological developments that improve their overall performance for optical and X-ray photon detection. Chapter 4 presents the basic laboratory equipment and methods used to carry out the experimental work of this thesis. Chapter 5 presents the characterisation of new high resistivity devices that were manufactured by e2v technologies during the work of this thesis. Chapter 6 describes a method for estimating the depletion depth of a CCD by analysing the X-ray event patterns that are generated in CCD image data. Chapter 7 presents the equipment developed and experimental measurements taken to evaluate the high energy X-ray quantum efficiency of a high resistivity CCD. Finally, Chapter 8 describes the ongoing development and characterisation of low noise ASICs that are intended for use in future X-ray astronomy missions

Belle II Technical Design Report

The Belle detector at the KEKB electron-positron collider has collected almost 1 billion Y(4S) events in its decade of operation. Super-KEKB, an upgrade of KEKB is under construction, to increase the luminosity by two orders of magnitude during a three-year shutdown, with an ultimate goal of 8E35 /cm^2 /s luminosity. To exploit the increased luminosity, an upgrade of the Belle detector has been proposed. A new international collaboration Belle-II, is being formed. The Technical Design Report presents physics motivation, basic methods of the accelerator upgrade, as well as key improvements of the detector.Comment: Edited by: Z. Dole\v{z}al and S. Un

SEIS: Insight's Seismic Experiment for Internal Structure of Mars.

By the end of 2018, 42 years after the landing of the two Viking seismometers on Mars, InSight will deploy onto Mars' surface the SEIS (Seismic Experiment for Internal Structure) instrument; a six-axes seismometer equipped with both a long-period three-axes Very Broad Band (VBB) instrument and a three-axes short-period (SP) instrument. These six sensors will cover a broad range of the seismic bandwidth, from 0.01 Hz to 50 Hz, with possible extension to longer periods. Data will be transmitted in the form of three continuous VBB components at 2 sample per second (sps), an estimation of the short period energy content from the SP at 1 sps and a continuous compound VBB/SP vertical axis at 10 sps. The continuous streams will be augmented by requested event data with sample rates from 20 to 100 sps. SEIS will improve upon the existing resolution of Viking's Mars seismic monitoring by a factor of ∼ 2500 at 1 Hz and ∼ 200 000 at 0.1 Hz. An additional major improvement is that, contrary to Viking, the seismometers will be deployed via a robotic arm directly onto Mars' surface and will be protected against temperature and wind by highly efficient thermal and wind shielding. Based on existing knowledge of Mars, it is reasonable to infer a moment magnitude detection threshold of M w ∼ 3 at 40 ∘ epicentral distance and a potential to detect several tens of quakes and about five impacts per year. In this paper, we first describe the science goals of the experiment and the rationale used to define its requirements. We then provide a detailed description of the hardware, from the sensors to the deployment system and associated performance, including transfer functions of the seismic sensors and temperature sensors. We conclude by describing the experiment ground segment, including data processing services, outreach and education networks and provide a description of the format to be used for future data distribution.Electronic supplementary materialThe online version of this article (10.1007/s11214-018-0574-6) contains supplementary material, which is available to authorized users

Near-field baseband communication system for use in biomedical implants

This thesis introduces the reader to the near-field baseband pulse radio communication for biomedical implants. It details the design and implementation of the complete communication system with a particular emphasis on the antenna structure and waveform coding that is compatible with this particular technology. The wireless communication system has great employability in small pill-sized biomedical diagnostic devices offering the advantages of low power consumption and easy integration with SoC and lab-in-a-pill technologies. The greatest challenge was the choice of antenna that had to be made to effectively transmit the pulses. A systematic approach has been carried out in arriving at the most suitable antenna for efficient emanation of pulses and the fields around it are analysed electromagnetically using a commercially available software. A magnetic antenna can be used to transmit the information from inside a human body to the outside world. The performance of the above antenna was evaluated in a salt solution of different concentrations which is similar to a highly conductive lossy medium like a human body. Near-field baseband pulse transmission is a waveform transmission scheme wherein the pulse shape is crucial for decoding information at the receiver. This demands a new approach to the antenna design, both at the transmitter and the receiver. The antenna had to be analysed in the time-domain to know its effects on the pulse and an expression for the antenna bandwidth has been proposed in this thesis. The receiving antenna should be able to detect very short pulses and while doing so has to also maintain the pulse shape with minimal distortion. Different loading congurations were explored to determine the most feasible one for receiving very short pulses. Return-to-zero (RZ), Non-return-zero (NRZ) and Manchester coded pulse waveforms were tested for their compatibility and performance with the near-field baseband pulse radio communication. It was concluded that Manchester coded waveform are perfectly suited for this particular near-field communication technology. Pulse interval modulation was also investigated and the findings suggested that it was easier to implement and had a high throughput rate too. A simple receiver algorithm has been suggested and practically tested on a digital signal processor. There is further scope for research to develop complex signal processing algorithms at the receiver