A 122 fps, 1 MHz bandwidth multi-frequency wearable EIT belt featuring novel active electrode architecture for neonatal thorax vital sign monitoring

A highly integrated, wearable electrical impedance tomography (EIT) belt for neonatal thorax vital multiple sign monitoring is presented. The belt has sixteen active electrodes. Each has an application specific integrated circuit (ASIC) connected to an electrode. The ASIC contains a fully differential current driver, a high-performance instrumentation amplifier (IA), a digital controller and multiplexors. The wearable EIT belt features a new active electrode architecture that allows programmable flexible electrode current drive and voltage sense patterns under simple digital control. It provides intimate connections to the electrodes for the current drive and to the IA for direct differential voltage measurement providing superior common-mode rejection ratio. The ASIC was designed in a CMOS 0.35-μm high-voltage technology. The high specification EIT belt has an image frame rate of 122 fps, a wide operating bandwidth of 1 MHz and multi-frequency operation. It measures impedance with 98% accuracy and has less than 0.5 Ω and 1o variation across all possible channels. The image results confirmed the advantage of the new active electrode architecture and the benefit of wideband, multi-frequency EIT operation. The wearable EIT belt can also detect patient position and torso shape information using a MEMS sensor interfaced to each ASIC. The system successfully captured high quality lung respiration EIT images, breathing cycle and heart rate

Advances in Integrated Circuits and Systems for Wearable Biomedical Electrical Impedance Tomography

Electrical impedance tomography (EIT) is an impedance mapping technique that can be used to image the inner impedance distribution of the subject under test. It is non-invasive, inexpensive and radiation-free, while at the same time it can facilitate long-term and real-time dynamic monitoring. Thus, EIT lends itself particularly well to the development of a bio-signal monitoring/imaging system in the form of wearable technology. This work focuses on EIT system hardware advancement using complementary metal oxide semiconductor (CMOS) technology. It presents the design and testing of application specific integrated circuit (ASIC) and their successful use in two bio-medical applications, namely, neonatal lung function monitoring and human-machine interface (HMI) for prosthetic hand control. Each year fifteen million babies are born prematurely, and up to 30% suffer from lung disease. Although respiratory support, especially mechanical ventilation, can improve their survival, it also can cause injury to their vulnerable lungs resulting in severe and chronic pulmonary morbidity lasting into adulthood, thus an integrated wearable EIT system for neonatal lung function monitoring is urgently needed. In this work, two wearable belt systems are presented. The first belt features a miniaturized active electrode module built around an analog front-end ASIC which is fabricated with 0.35-µm high-voltage process technology with ±9 V power supplies and occupies a total die area of 3.9 mm². The ASIC offers a high power active current driver capable of up to 6 mAp-p output, and wideband active buffer for EIT recording as well as contact impedance monitoring. The belt has a bandwidth of 500 kHz, and an image frame rate of 107 frame/s. To further improve the system, the active electrode module is integrated into one ASIC. It contains a fully differential current driver, a current feedback instrumentation amplifier (IA), a digital controller and multiplexors with a total die area of 9.6 mm². Compared to the conventional active electrode architecture employed in the first EIT belt, the second belt features a new architecture. It allows programmable flexible electrode current drive and voltage sense patterns under simple digital control. It has intimate connections to the electrodes for the current drive and to the IA for direct differential voltage measurement providing superior common-mode rejection ratio (CMRR) up to 74 dB, and with active gain, the noise level can be reduced by a factor of √3 using the adjacent scan. The second belt has a wider operating bandwidth of 1 MHz and multi-frequency operation. The image frame rate is 122 frame/s, the fastest wearable EIT reported to date. It measures impedance with 98% accuracy and has less than 0.5 Ω and 1° variation across all channels. In addition the ASIC facilitates several other functionalities to provide supplementary clinical information at the bedside. With the advancement of technology and the ever-increasing fusion of computer and machine into daily life, a seamless HMI system that can recognize hand gestures and motions and allow the control of robotic machines or prostheses to perform dexterous tasks, is a target of research. Originally developed as an imaging technique, EIT can be used with a machine learning technique to track bones and muscles movement towards understanding the human user’s intentions and ultimately controlling prosthetic hand applications. For this application, an analog front-end ASIC is designed using 0.35-µm standard process technology with ±1.65 V power supplies. It comprises a current driver capable of differential drive and a low noise (9μVrms) IA with a CMRR of 80 dB. The function modules occupy an area of 0.07 mm². Using the ASIC, a complete HMI system based on the EIT principle for hand prosthesis control has been presented, and the user’s forearm inner bio-impedance redistribution is assessed. Using artificial neural networks, bio-impedance redistribution can be learned so as to recognise the user’s intention in real-time for prosthesis operation. In this work, eleven hand motions are designed for prosthesis operation. Experiments with five subjects show that the system can achieve an overall recognition accuracy of 95.8%

Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

This paper presents a multi-channel dual-mode CMOS analogue front-end (AFE) for electrochemical and bioimpedance analysis. Current-mode and voltage-mode readouts, integrated on the same chip, can provide an adaptable platform to correlate single-cell biosensor studies with large-scale tissue or organ analysis for real-time cancer detection, imaging and characterization. The chip, implemented in a 180-nm CMOS technology, combines two current-readout (CR) channels and four voltage-readout (VR) channels suitable for both bipolar and tetrapolar electrical impedance spectroscopy (EIS) analysis. Each VR channel occupies an area of 0.48 mm 2 , is capable of an operational bandwidth of 8 MHz and a linear gain in the range between -6 dB and 42 dB. The gain of the CR channel can be set to 10 kΩ, 50 kΩ or 100 kΩ and is capable of 80-dB dynamic range, with a very linear response for input currents between 10 nA and 100 μ A. Each CR channel occupies an area of 0.21 mm 2 . The chip consumes between 530 μ A and 690 μ A per channel and operates from a 1.8-V supply. The chip was used to measure the impedance of capacitive interdigitated electrodes in saline solution. Measurements show close matching with results obtained using a commercial impedance analyser. The chip will be part of a fully flexible and configurable fully-integrated dual-mode EIS system for impedance sensors and bioimpedance analysis

Electrical Impedance Tomography for Biomedical Applications: Circuits and Systems Review

There has been considerable interest in electrical impedance tomography (EIT) to provide low-cost, radiation-free, real-time and wearable means for physiological status monitoring. To be competitive with other well-established imaging modalities, it is important to understand the requirements of the specific application and determine a suitable system design. This paper presents an overview of EIT circuits and systems including architectures, current drivers, analog front-end and demodulation circuits, with emphasis on integrated circuit implementations. Commonly used circuit topologies are detailed, and tradeoffs are discussed to aid in choosing an appropriate design based on the application and system priorities. The paper also describes a number of integrated EIT systems for biomedical applications, as well as discussing current challenges and possible future directions

Design of ASIC Based Electrical Impedance Tomography Microendoscopic System for Prostate Cancer Surgical Marginal Assessment

Prostate cancer is the second most common cancer in the United States. It is typically treated by surgically excising the cancerous section of the prostate. Because there is not always a visible distinction between the healthy and cancerous sections, surgery often leaves some cancerous tissue behind. This is referred to as a positive surgical margin and it requires adjuvant treatment with adverse side effects. Electrical impedance tomography (EIT) is a low-cost low-form-factor method that can be used to assess surgical marginal intraoperatively to ensure that no cancerous tissue is left behind. EIT-based surgical margin assessment works on the principle that the electrical properties of cancerous tissue are different from those of healthy tissue. These differences are small at lower frequencies but become more pronounced at frequencies of 1 MHz and higher. Unfortunately, previous EIT solutions for surgical marginal assessment have been limited to operating frequencies of less than 1 MHz. This thesis presents a custom application-specific integrated circuit (ASIC) analog front end for performing EIT with a signal-to-noise ratio of 75 dB up to an operating frequency of 10 MHz. The custom ASIC was integrated into a 16-electrode EIT system for surgical marginal assessment. The entire system was tested on a saline phantom with a 2 mm bead that represented a cancerous lesion. The EIT system produced single-frequency and multi-frequency images showing the presence of the inclusion

CMOS Design of Reconfigurable SoC Systems for Impedance Sensor Devices

La rápida evolución en el campo de los sensores inteligentes, junto con los avances en las tecnologías de la computación y la comunicación, está revolucionando la forma en que recopilamos y analizamos datos del mundo físico para tomar decisiones, facilitando nuevas soluciones que desempeñan tareas que antes eran inconcebibles de lograr.La inclusión en un mismo dado de silicio de todos los elementos necesarios para un proceso de monitorización y actuación ha sido posible gracias a los avances en micro (y nano) electrónica. Al mismo tiempo, la evolución de las tecnologías de procesamiento y micromecanizado de superficies de silicio y otros materiales complementarios ha dado lugar al desarrollo de sensores integrados compatibles con CMOS, lo que permite la implementación de matrices de sensores de alta densidad. Así, la combinación de un sistema de adquisición basado en sensores on-Chip, junto con un microprocesador como núcleo digital donde se puede ejecutar la digitalización de señales, el procesamiento y la comunicación de datos proporciona características adicionales como reducción del coste, compacidad, portabilidad, alimentación por batería, facilidad de uso e intercambio inteligente de datos, aumentando su potencial número de aplicaciones.Esta tesis pretende profundizar en el diseño de un sistema portátil de medición de espectroscopía de impedancia de baja potencia operado por batería, basado en tecnologías microelectrónicas CMOS, que pueda integrarse con el sensor, proporcionando una implementación paralelizable sin incrementar significativamente el tamaño o el consumo, pero manteniendo las principales características de fiabilidad y sensibilidad de un instrumento de laboratorio. Esto requiere el diseño tanto de la etapa de gestión de la energía como de las diferentes celdas que conforman la interfaz, que habrán de satisfacer los requisitos de un alto rendimiento a la par que las exigentes restricciones de tamaño mínimo y bajo consumo requeridas en la monitorización portátil, características que son aún más críticas al considerar la tendencia actual hacia matrices de sensores.A nivel de celdas, se proponen diferentes circuitos en un proceso CMOS de 180 nm: un regulador de baja caída de voltaje como unidad de gestión de energía, que proporciona una alimentación de 1.8 V estable, de bajo ruido, precisa e independiente de la carga para todo el sistema; amplificadores de instrumentación con una aproximación completamente diferencial, que incluyen una etapa de entrada de voltaje/corriente configurable, ganancia programable y ancho de banda ajustable, tanto en la frecuencia de corte baja como alta; un multiplicador para conformar la demodulación dual, que está embebido en el amplificador para optimizar consumo y área; y filtros pasa baja totalmente integrados, que actúan como extractores de magnitud de DC, con frecuencias de corte ajustables desde sub-Hz hasta cientos de Hz.<br /

Investigation of undesired errors relating to the planar array system of electrical impedance mammography for breast cancer detection

Breast cancer in women continues to be one of the leading causes of death in the world. Since the exact causes are not completely known, the most important approach is to reduce this mortality by early detection and treatment. Although the current detection techniques for breast cancer such as X-ray mammography provide useful informationfor diagnosis; development of a new imaging technique using non-ionising radiation is highly desirable in order to detect breast cancer at an early stage and overcome current limitations, such as age-dependent sensitivity. Electrical Impedance Mammography (EIM) provides a new solution to break through the current limitation for early cancer detection. The focus of this thesis is to investigate the current fourth generation Sussex EIM system. This system implements the EIM technique by examination of the tissueresponse to a multi-frequency injected current. The Sussex Mk4 system is discussed indetail followed by system hardware modelling. The hardware modelling includes both analogue and digital components. The analogue part includes modelling of the voltage to current converter (V-I) and analogue multiplexer while the digital section consists of modelling the signal generation, measurement and demodulating components. In the analogue section, bandwidth limitation due to the current source and the analogue multiplexer’s configuration is also the prime focus of investigation along with the proposal to overcome it. Possible factors affecting the system performance and signal quality are also part of the research. In this section, possible factors are characterized and discussed in detail on the basis of external and internal sources of possible errors along with predictable and unpredictable noise sources. External sources of error artefacts introduced by the patients and their movements while scanning are most likely to affect the image reconstruction. Predictable and unpredictable causes may introduce frequency dependent noise whereas internal sources, which can be also be classified as systematic errors, degrade system performance due to electronic circuit design, configuration, stray capacitance and cable connections. Further, comprehensive investigation is performed on the in-vivoun desired voltage threshold levels which come hand-in-hand with the methods to mitigate the possible factors responsible for them. A comprehensive study and analysis is also carried out to determine what ratio of electrode blockage can affect the acquired raw data and how this may compromise reconstruction. Techniques for fast detection of any such occurrences are also discussed

An Integrated Analog Readout for Multi-Frequency Bioimpedance Measurements

Bioimpedance spectroscopy is used in a wide range of biomedical applications. This paper presents an integrated analog readout, which employs synchronous detection to perform galvanostatic multi-channel, multi-frequency bioimpedance measurements. The circuit was fabricated in a 0.35-μm CMOS technology and occupies an area of 1.52 mm2. The effect of random dc offsets is investigated, along with the use of chopping to minimize them. Impedance measurements of a known RC load and skin (using commercially available electrodes) demonstrate the operation of the system over a frequency range up to 1 MHz. The circuit operates from a ±2.5 V power supply and has a power consumption of 3.4-mW per channel

Development of real-time cellular impedance analysis system

The cell impedance analysis technique is a label-free, non-invasive method, which simplifies sample preparation and allows applications requiring unmodified cell retrieval. However, traditional impedance measurement methods suffer from various problems (speed, bandwidth, accuracy) for extracting the cellular impedance information. This thesis proposes an improved system for extracting precise cellular impedance in real-time, with a wide bandwidth and satisfactory accuracy. The system hardware consists of five main parts: a microelectrode array (MEA), a stimulation circuit, a sensing circuit, a multi-function card and a computer. The development of system hardware is explored. Accordingly, a novel bioimpedance measurement method coined digital auto balancing bridge method, which is improved from the traditional analogue auto balancing bridge circuitry, is realized for real-time cellular impedance measurement. Two different digital bridge balancing algorithms are proposed and realized, which are based on least mean squares (LMS) algorithm and fast block LMS (FBLMS) algorithm for single- and multi-frequency measurements respectively. Details on their implementation in FPGA are discussed. The test results prove that the LMS-based algorithm is suitable for accelerating the measurement speed in single-frequency situation, whilst the FBLMS-based algorithm has advantages in stable convergence in multi-frequency applications. A novel algorithm, called the All Phase Fast Fourier Transform (APFFT), is applied for post-processing of bioimpedance measurement results. Compared with the classical FFT algorithm, the APFFT significantly reduces spectral leakage caused by truncation error. Compared to the traditional FFT and Digital Quadrature Demodulation (DQD) methods, the APFFT shows excellent performance for extracting accurate phase and amplitude in the frequency spectrum. Additionally, testing and evaluation of the realized system has been performed. The results show that our system achieved a satisfactory accuracy within a wide bandwidth, a fast measurement speed and a good repeatability. Furthermore, our system is compared with a commercial impedance analyzer (Agilent 4294A) in biological experiments. The results reveal that our system achieved a comparable accuracy to the commercial instrument in the biological experiments. Finally, conclusions are given and the future work is proposed

Design of sensor electronics for electrical capacitance tomography

The design of the sensor electronics for a tomographic imaging system based on electrical capacitance sensors is described. The performance of the sensor electronics is crucial to the performance of the imaging system. The problems associated with such a measurement process are discussed and solutions to these are described. Test results show that the present design has a resolution of 0.3 femtofarad. (For a 12-electrode system imaging an oil/gas flow, this represents a 2% gas void fraction change at the centre of the pipe) with a low noise level of 0.08 fF (RMS value), a large dynamic range of 76 dB and a data acquisition speed of 6600 measurements per second. This enables sensors with up to 12 electrodes to be used in a system with a maximum imaging rate of 100 frames per second, and thus provides an improved image resolution over the earlier 8-electrode system and an adequate electrode area to give sufficient measurement sensitivit