94 research outputs found

    Design and Implementation of a 1-5 GHz UWB Low Noise Amplifier in 0.18 um CMOS

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    High frequency of low noise amplifier architecture for WiMAX application: A review

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    The low noise amplifier (LNA) circuit is exceptionally imperative as it promotes and initializes general execution performance and quality of the mobile communication system. LNA's design in radio frequency (R.F.) circuit requires the trade-off numerous imperative features' including gain, noise figure (N.F.), bandwidth, stability, sensitivity, power consumption, and complexity. Improvements to the LNA's overall performance should be made to fulfil the worldwide interoperability for microwave access (WiMAX) specifications' prerequisites. The development of front-end receiver, particularly the LNA, is genuinely pivotal for long-distance communications up to 50 km for a particular system with particular requirements. The LNA architecture has recently been designed to concentrate on a single transistor, cascode, or cascade constrained in gain, bandwidth, and noise figure

    A dual-mode Q-enhanced RF front-end filter for 5 GHz WLAN and UWB with NB interference rejection

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    The 5 GHz Wireless LAN (802.11a) is a popular standard for wireless indoor communications providing moderate range and speed. Combined with the emerging ultra Wideband standard (UWB) for short range and high speed communications, the two standards promise to fulfil all areas of wireless application needs. However, due to the overlapping of the two spectrums, the stronger 802.11a signals tend to interfere causing degradation to the UWB receiver. This presents one of the main technical challenges preventing the wide acceptance of UWB. The research work presented in this thesis is to propose a low cost RF receiver front-end filter topology that would resolve the narrowband (NB) interference to UWB receiver while being operable in both 802.11a mode and UWB mode. The goal of the dual mode filter design is to reduce cost and complexity by developing a fully integrated front-end filter. The filter design utilizes high Q passive devices and Q-enhancement technique to provide front-end channel-selection in NB mode and NB interference rejection in UWB mode. In the 802.11a NB mode, the filter has a tunable gain of 4 dB to 25 dB, NF of 8 dB and an IIP3 between -47 dBm and -18 dBm. The input impedance is matched at -16 dB. The frequency of operation can be tuned from 5.15 GHz to 5.35 GHz. In the UWB mode, the filter has a gain of 0 dB to 8 dB across 3.1 GHz to 9 GHz. The filter can reject the NB interference between 5.15 GHz to 5.35 GHz at up to 60 dB. The Q of the filter is tunable up to a 250 while consuming a maximum of 23.4 mW of power. The fully integrated dual mode filter occupies a die area of 1.1 mm2

    A 1-5 GHz UWB low noise amplifier in 0.18 µm CMOS

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    Development of RF CMOS receiver front-ends for ultrawideband

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    Ultra-Wideband (UWB) technology has become one of the hottest topics in wireless communications, for it provides cost-effective, power-efficient, high bandwidth solution for relaying data in the immediate area (up to 10 meters). This work demonstrates two different solutions for the RF front-end designs in the UWB receivers, one is distributed topology, and the other is based on traditional lumped element topology. The distributed amplifier is one of the attractive candidates for UWB Low Noise Amplifier (LNA). The design, analysis and operation of the distributed amplifiers will be presented. A distributed amplifier is designed with Coplanar Waveguide (CPW) transmission lines in 0.25-μm CMOS process for time domain UWB applications. New design techniques and new topologies are developed to enhance the power-efficiency and reduce the chip area. A compact and high performance distributed amplifier with Patterned Grounded Shield (PGS) inductors is developed in 0.25-μm CMOS process. The amplifier has a measurement result of 7.2dB gain, 4.2-6dB noise figure, and less than -10dB return loss through 0-11GHz. A new distributed amplifier implementing cascade common source gain cells is presented in 0.18-μm CMOS. The new amplifier demonstrates a high gain of 16dB at a power consumption of 100mW, and a gain of 10dB at a low power consumption of 19mW. A UWB LNA utilizing resistive shunt feedback technique is reported in 0.18-μm CMOS process. The measurement results of the UWB LNA demonstrate a maximum gain of 10.5dB and a noise figure of 3.3-4.5dB from 3-9.5GHz, while only consuming 9mW power. Based on the distributed amplifier and resistive shunt-feedback amplifier designs, two UWB RF front-ends are developed. One is a distributed LNA-Mixer. Unlike the conventional distributed mixer, which can only deliver low gain and high noise figure, the proposed distributed LNA-Mixer demonstrates 12-14dB gain ,4-5dB noise figure and higher than 10dB return loss at RF and LO ports over 2-16GHz. To overcome the power consumption and chip area problems encountered in distributed circuits, another UWB RF front-end is also designed with lumped elements. This front-end, employing resistive shunt-feedback technique into its LNA design, can achieve a gain of 12dB and noise figure of 8-10dB through 3-10GHz, the return loss of less than -10dB from 3- 10GHz at RF port, and less than -7dB at LO port, while only consuming 25mA current from 1.8V voltage supply

    High Efficiency, Good phase linearity 0.18 µm CMOS Power Amplifier for MBAN-UWB Applications

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    This paper presents the design of 3.1-10.6 GHz class AB power amplifier (PA) suitable for medical body area network (MBAN) Ultra-Wide Band (UWB) applications in TSMC 0.18 µm technology. An optimization technique to simultaneously maximize power added efficiency(PAE) and minimize group delay variation is employed. Source and Load-pull contours are used to design inter and output stage matching circuits. The post-layout simulation results indicated that the designed PA has a maximum PAE of 32 % and an output 1-dB compression of 11 dBm at 4 GHz. In addition, a small group delay variation of ± 50 ps was realized over the whole required frequency band . Moreover, the proposed PA has small signal power gain (S21) of 12.5 dB with ripple less than 1.5 dB over the frequency range between 3.1 GHz to 10.6 GHz, while consuming 36 mW

    HIGH LINEARITY UNIVERSAL LNA DESIGNS FOR NEXT GENERATION WIRELESS APPLICATIONS

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    Design of the next generation (4G) systems is one of the most active and important area of research and development in wireless communications. The 2G and 3G technologies will still co-exist with the 4G for a certain period of time. Other applications such as wireless LAN (Local Area Network) and RFID are also widely used. As a result, there emerges a trend towards integrating multiple wireless functionalities into a single mobile device. Low noise amplifier (LNA), the most critical component of the receiver front-end, determines the sensitivity and noise figure of the receiver and is indispensable for the complete system. To satisfy the need for higher performance and diversity of wireless communication systems, three LNAs with different structures and techniques are proposed in the thesis based on the 4G applications. The first LNA is designed and optimized specifically for LTE applications, which could be easily added to the existing system to support different standards. In this cascode LNA, the nonlinearity coming from the common source (CS) and common gate (CG) stages are analyzed in detail, and a novel linear structure is proposed to enhance the linearity in a relatively wide bandwidth. The LNA has a bandwidth of 900MHz with the linearity of greater than 7.5dBm at the central frequency of 1.2GHz. Testing results show that the proposed structure effectively increases and maintains linearity of the LNA in a wide bandwidth. However, a broadband LNA that covers multiple frequency ranges appears more attractive due to system simplicity and low cost. The second design, a wideband LNA, is proposed to cover multiple wireless standards, such as LTE, RFID, GSM, and CDMA. A novel input-matching network is proposed to relax the tradeoff among noise figure and bandwidth. A high gain (>10dB) in a wide frequency range (1-3GHz) and a minimum NF of 2.5dB are achieved. The LNA consumes only 7mW on a 1.2V supply. The first and second LNAs are designed mainly for the LTE standard because it is the most widely used standard in the 4G communication systems. However, WiMAX, another 4G standard, is also being widely used in many applications. The third design targets on covering both the LTE and the WiMAX. An improved noise cancelling technique with gain enhancing structure is proposed in this design and the bandwidth is enlarged to 8GHz. In this frequency range, a maximum power gain of 14.5dB and a NF of 2.6-4.3dB are achieved. The core area of this LNA is 0.46x0.67mm2 and it consumes 17mW from a 1.2V supply. The three designs in the thesis work are proposed for the multi-standard applications based on the realization of the 4G technologies. The performance tradeoff among noise, linearity, and broadband impedance matching are explored and three new techniques are proposed for the tradeoff relaxation. The measurement results indicate the techniques effectively extend the bandwidth and suppress the increase of the NF and nonlinearity at high frequencies. The three proposed structures can be easily applied to the wideband and multi-standard LNA design

    Survey on individual components for a 5 GHz receiver system using 130 nm CMOS technology

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    La intención de esta tesis es recopilar información desde un punto de vista general sobre los diferentes tipos de componentes utilizados en un receptor de señales a 5 GHz utilizando tecnología CMOS. Se ha realizado una descripción y análisis de cada uno de los componentes que forman el sistema, destacando diferentes tipos de configuraciones, figuras de mérito y otros parámetros. Se muestra una tabla resumen al final de cada sección, comparando algunos diseños que se han ido presentando a lo largo de los años en conferencias internacionales de la IEEE.The intention of this thesis is to gather information from an overview point about the different types of components used in a 5 GHz receiver using CMOS technology. A review of each of the components that form the system has been made, highlighting different types of configurations, figure of merits and parameters. A summary table is shown at the end of each section, comparing many designs that have been presented over the years at international conferences of the IEEE.Departamento de Ingeniería Energética y FluidomecánicaGrado en Ingeniería en Electrónica Industrial y Automátic
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