70 research outputs found
Low-voltage tunable pseudo-differential transconductor with high linearity
A novel tunable transconductor is presented. Input
transistors operate in the triode region to achieve
programmable voltage-to-current conversion. These
transistors are kept in the triode region by a novel
negative feedback loop which features simplicity, low
voltage requirements, and high output resistance. A
linearity analysis is carried out which demonstrates how
the proposed transconductance tuning scheme leads to
high linearity in a wide transconductance range.
Measurement results for a 0.5 μm CMOS implementation
of the transconductor show a transconductance tuning
range of more than a decade (15 μA/V to 165 μA/V) and a
total harmonic distortion of −67 dB at 1 MHz for an input
of 1 Vpp and a supply voltage of 1.8 V
Systematic Comparison of HF CMOS Transconductors
Transconductors are commonly used as active elements in high-frequency (HF) filters, amplifiers, mixers, and oscillators. This paper reviews transconductor design by focusing on the V-I kernel that determines the key transconductor properties. Based on bandwidth considerations, simple V-I kernels with few or no internal nodes are preferred. In a systematic way, virtually all simple kernels published in literature are generated. This is done in two steps: 1) basic 3-terminal transconductors are covered and 2) then five different techniques to combine two of them in a composite V-I kernel. In order to compare transconductors in a fair way, a normalized signal-to-noise ratio (NSNR) is defined. The basic V-I kernels and the five classes of composite V-I kernels are then compared, leading to insight in the key mechanisms that affect NSNR. Symbolic equations are derived to estimate NSNR, while simulations with more advanced MOSFET models verify the results. The results show a strong tradeoff between NSNR and transconductance tuning range. Resistively generated MOSFETs render the best NSNR results and are robust for future technology developments
Rail-to-rail class AB CMOS tunable transconductor with -52dB IM3 at 1MHz
A novel CMOS tunable transconductor is presented.
The circuit operates in classAB hence featuring power efficiency.
The internal feedback employed and the use of a linearized triode
transistor for voltage-to-current conversion allows achieving high
linearity. Rail-to-rail input range is obtained by using floatinggate
transistors. Measurement results for a test chip prototype in
a 0.5µm standard CMOS process show an IM3 of -52.13dB at
1MHz for a 2Vpp input and a power consumption of 2.2mW
High frequency and high dynamic range continuous time filters
Many modern communication systems use orthogonal frequency division
multiplexing (OFDM) and discrete multi-tone (DMT) as modulation schemes where
high data rates are transmitted over a wide frequency band in multiple orthogonal subcarriers.
Due to the many advantages, such as flexibility, good noise immunity and the
ability to be optimized for medium conditions, the use of DMT and OFDM can be found
in digital video broadcasting, local area wireless network (IEEE 802.11a), asymmetric
digital subscriber line (ADSL), very high bit rate DSL (VDSL) and power line
communications (PLC). However, a major challenge is the design of the analog frontend;
for these systems a large dynamic range is required due to the significant peak to
average ratio of the resulting signals. In receivers, very demanding high-performance
analog filters are typically used to block interferers and provide anti-aliasing before the
subsequent analog to digital conversion stage. For frequencies higher than 10MHz, Gm-C filter implementations are generally
preferred due to the more efficient operation of wide-band operational transconductance
amplifiers (OTA). Nevertheless, the inherent low-linearity of open-loop operated OTA
limits the dynamic range. In this dissertation, three different proposed OTA linearity
enhancement techniques for the design of high frequency and high dynamic range are
presented. The techniques are applied to two filter implementations: a 20MHz second
order tunable filter and a 30MHz fifth order elliptical low-pass filter. Simulation and
experimental results show a spurious free dynamic range (SFDR) of 65dB with a power
consumption of 85mW. In a figure of merit where SFDR is normalized to the power
consumption, this filter is 6dB above the trend-line of recently reported continuous time
filters
Low-voltage, low-power circuits for data communication systems
There are growing industrial demands for low-voltage supply and low-power consumption circuits and systems. This is especially true for very high integration level and very large scale integrated (VLSI) mixed-signal chips and system-on-a-chip. It is mainly due to the limited power dissipation within a small area and the costs related to the packaging and thermal management. In this research work, two low-voltage, low-power integrated circuits used for data communication systems are introduced. The first one is a high performance continuous-time linear phase filter with automatic frequency tuning. The filter can be used in hard disk driver systems and wired communication systems such as 1000Base-T transceivers. A pseudo-differential operational transconductance amplifier (OTA) based on transistors operating in triode region is used to achieve a large linear signal swing with low-voltage supplies. A common-mode (CM) control circuit that combines common-mode feedback (CMFB), common-mode feedforward (CMFF), and adaptive-bias has been proposed. With a 2.3V single supply, the filters total harmonic distortion is less than 44dB for a 2VPP differential input, which is due to the well controlled CM behavior. The ratio of the root mean square value of the ac signal to the power supply voltage is around 31%, which is much better than previous realizations. The second integrated circuit includes two LVDS drivers used for high-speed point-to-point links. By removing the stacked switches used in the conventional structures, both LVDS drivers can operate with ultra low-voltage supplies. Although the Double Current Sources (DCS) LVDS driver draws twice minimum static current as required by the signal swing, it is quite simple and achieves very high speed operation. The Switchable Current Sources (SCS) LVDS driver, by dynamically switching the current sources, draws minimum static current and reduces the power consumption by 60% compared to the previously reported LVDS drivers. Both LVDS drivers are compliant to the standards and operate at data rates up to gigabits-per-second
Tunable class AB CMOS Gm-C channel filter for a bluetooth zero-IF receiver
A novel tunable third order low-pass Gm-C filter is
introduced. Programmable transconductors operating in class AB
have been used for its implementation hence featuring low
quiescent power consumption. The operation in class AB is
achieved using quasi-floating gate transistors. This filter is
suitable for channel filtering of highly integrated, ultra low
power wireless receivers e.g. for Bluetooth and Zigbee.
Measurement results for a test chip prototype in a low-cost 0.5µm standard CMOS process are presented
Design of a Low Power 70MHz-110MHz Harmonic Rejection Filter with Class-AB Output Stage
An FM transmitter becomes the new feature in recent portable electronic
development. A low power, integrable FM transmitter filter IC is required to meet the
demand of FM transmitting feature. A low pass filter using harmonic rejection technique
along with a low power class-AB output buffer is designed to meet the current market
requirements on the FM transmitter chip.
A harmonic rejection filter is designed to filter FM square wave signal from
70MHz to 110MHz into FM sine wave signal. Based on Fourier series, the harmonic
rejection technique adds the phase shifted square waves to achieve better THD and less
high frequency harmonics. The phase shifting is realized through a frequency divider,
and the summation is implemented through a current summation circuit. A RC low pass
filter with automatic tuning is designed to further attenuate unwanted harmonics. In this
work, the filter's post layout simulation shows -53dB THD and harmonics above
800MHz attenuation of -99dB. The power consumption of the filter is less than 0.7mW.
Output buffer stage is implemented through a resistor degenerated transconductor
and a class-AB amplifier. Feedforward frequency compensation is applied to compensate the output class-AB stage, which extends the amplifier's operating
bandwidth. A fully balanced class-AB driver is proposed to unleash the driving
capability of common source output transistors. The output buffer reaches -43dB THD at
110MHz with 0.63Vpp output swing and drives 1mW into 50 load. The power
consumption of the output buffer is 7.25mW.
By using harmonic rejection technique, this work realizes the 70MHz-110MHz
FM carrier filtering using TSMC 0.18um nominal process. Above 800MHz harmonics
are attenuated to below -95dB. With 1.2V supply, the total power consumption including
output buffer is 7.95mW. The total die area is 0.946mm2
Equalization of Third-Order Intermodulation Products in Wideband Direct Conversion Receivers
This paper reports a SAW-less direct-conversion receiver which utilizes a mixed-signal feedforward path to regenerate and adaptively cancel IM3 products, thus accomplishing system-level linearization. The receiver system performance is dominated by a custom integrated RF front end implemented in 130-nm CMOS and achieves an uncorrected out-of-band IIP3 of -7.1 dBm under the worst-case UMTS FDD Region 1 blocking specifications. Under IM3 equalization, the receiver achieves an effective IIP3 of +5.3 dBm and meets the UMTS BER sensitivity requirement with 3.7 dB of margin
Nonlinearity and noise modeling of operational transconductance amplifiers for continuous time analog filters
A general framework for performance optimization of continuous-time OTA-C
(Operational Transconductance Amplifier-Capacitor) filters is proposed. Efficient
procedures for evaluating nonlinear distortion and noise valid for any filter of arbitrary
order are developed based on the matrix description of a general OTA-C filter model .
Since these procedures use OTA macromodels, they can be used to obtain the results
significantly faster than transistor-level simulation. In the case of transient analysis, the
speed-up may be as much as three orders of magnitude without almost no loss of
accuracy. This makes it possible to carry out direct numerical optimization of OTA-C
filters with respect to important characteristics such as noise performance, THD, IM3,
DR or SNR. On the other hand, the general OTA-C filter model allows us to apply
matrix transforms that manipulate (rescale) filter element values and/or change topology
without changing its transfer function. The above features are a basis to build automated
optimization procedures for OTA-C filters. In particular, a systematic optimization
procedure using equivalence transformations is proposed. The research also proposes
suitable software implementations of the optimization process. The first part of the
research proposes a general performance optimization procedure and to verify the
process two application type examples are mentioned. An application example of the
proposed approach to optimal block sequencing and gain distribution of 8th order
cascade Butterworth filter (for two variants of OTA topologies) is given. Secondly the
modeling tool is used to select the best suitable topology for a 5th order Bessel Low Pass
Filter. Theoretical results are verified by comparing to transistor-level simulation withCADENCE. For the purpose of verification, the filters have also been fabricated in
standard 0.5mm CMOS process.
The second part of the research proposes a new linearization technique to
improve the linearity of an OTA using an Active Error Feedforward technique. Most
present day applications require very high linear circuits combined with low noise and
low power consumption. An OTA based biquad filter has also been fabricated in 0.35mm
CMOS process. The measurement results for the filter and the stand alone OTA have
been discussed. The research focuses on these issues
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