System-Level Integrated Circuit (SLIC) Technology Development for Phased Array Antenna Applications

This report documents the efforts and progress in developing a 'system-level' integrated circuit, or SLIC, for application in advanced phased array antenna systems. The SLIC combines radio-frequency (RF) microelectronics, digital and analog support circuitry, and photonic interfaces into a single micro-hybrid assembly. Together, these technologies provide not only the amplitude and phase control necessary for electronic beam steering in the phased array, but also add thermally-compensated automatic gain control, health and status feedback, bias regulation, and reduced interconnect complexity. All circuitry is integrated into a compact, multilayer structure configured for use as a two-by-four element phased array module, operating at 20 Gigahertz, using a Microwave High-Density Interconnect (MHDI) process. The resultant hardware is constructed without conventional wirebonds, maintains tight inter-element spacing, and leads toward low-cost mass production. The measured performances and development issues associated with both the two-by-four element module and the constituent elements are presented. Additionally, a section of the report describes alternative architectures and applications supported by the SLIC electronics. Test results show excellent yield and performance of RF circuitry and full automatic gain control for multiple, independent channels. Digital control function, while suffering from lower manufacturing yield, also proved successful

Low power GaAs digital and analog functionalities for microwave signal conditioning in AESA systems

A MMIC demonstrator for RF phase and amplitude control with on board 18-bit serial to parallel conversion (Multi-Functional Chip) is presented. Thanks to an alternative digital building block topology, the DC power consumption of the digital serial to parallel converter is noteworthy: less than 43 mW (2 mW/bit). The main RF performances are 0° - 360° phase coverage and 0 dB - 31.5 dB attenuation setting, in the 7.6 GHz - 9.1 GHz operating bandwidth. The circuit, whose area is 6 mm2, is realised in an industrial and commercially available GaAs technology. This component can be used in active electronically scanned arrays for beam steering

Ultralow-Power Digital Control and Signal Conditioning in GaAs MMIC Core Chip for X-Band AESA Systems

This work presents the design and characterization of an ultralow-power core chip for electronically scanned arrays at X-band, implemented in 0.25-/0.5-μm E-/D-mode gallium arsenide (GaAs) pHEMT technology. In particular, design details are given about the two core functional blocks embedded in the microwave monolithic integrated circuit (MMIC): a 12-bit phase and amplitude control circuit and an 18-bit serial-to-parallel (S2P) interface. The S2P interface was designed resorting to a custom symmetric device model, expressly conceived for the time-domain simulations required for digital circuits. Due to the adoption of a differential structure with resistive pull-ups, it achieves a state-of-the-art power consumption of 2.2 mW/bit and nearly 87% yield. The analog circuit includes a 6-bit phase shifter (PS) and a 6-bit attenuator. To mitigate risks, two different PS architectures have been developed and are compared in this work, discussing advantages and drawbacks of the different solutions. Since the two designs share the same target specifications, a truly fair comparison can be made not only in terms of performance but also concerning robustness and repeatability, thus providing useful guidelines for the selection of the most appropriate strategy. In particular, it is shown that one architecture outperforms the other by about 2 dB and 1.5° in terms of insertion loss and rms phase error, respectively

L-Band MMICs for Space-based SAR system

The design and performance of an L-Band GaAs chip-set is presented.The chip-set consists of a 6-bit attenuator circuit,a Low-Noise Amplifier (LNA)and a Multi Function Chip that is the combination of a 6-bit attenuator and 6-bit Phase shifter circuit.The chip-set is developed for the pre-flight engineering T/R (Transmit and Receive)modules currently in development with Astrium in a space-based SAR (Synthetic Aperture Radar)system.The MMICs are realised in the 0.25 µm PHEMT (PH25)technology of UMS.Only one iteration was needed for the MMICs in order to be fully compliant with the specifications

A true-time-delay networks design technique

This paper proposes a technique to design wide band switched-line (SL) true-time-delay (TTD) networks, commonly used for phased array antenna (PAA) applications. This study investigates the constant-delay behavior of switched-line phase shifters based on single-pole double-throw (SPDT) switches. Circuit sizing starts by considering the effective S-parameters of the switches, to use their non-idealities as an integral part of the phase shift linearly dependent to the frequency and by considering, from the beginning, the possible spatial positioning of elements that allows the circuit feasibility as a design target. The aim of this study is to provide a technique suitable for the design of well-matched TTD networks with a flat delay in wide bandwidth. In this paper, we propose new design formulas for which we show a single-frequency implementation. A computational strategy is used to obtain numerical solutions of the derived equations with this study. Finally, a monolithic X-band TTD circuit example is shown

A 32-GHz phased array transmit feed for spacecraft telecommunications

A 21-element phased array transmit feed was demonstrated as part of an effort to develop and evaluate state-of-the-art transmitter and receiver components at 32 and 34 GHz for future deep-space missions. Antenna pattern measurements demonstrating electronic beam steering of the two-dimensional array are reported and compared with predictions based on measured performance of MMIC-based phase shifter and amplifier modules and Vivaldi slotline radiating elements

Evolutionary trends in Transmit/Receive Module for Active Phased Array Radars

Worldwide, defense technologies are rapidly evolving and are currently aiming at integrating diverse functionalities like Radar, Electronic Warfare, Communications, etc., on a singular miniaturized platform. Hence, it cannot be denied that the advancements in modern Active Phased Array Radar technologies assume a critical role towards the achievement of this goal. A typical Active Phased Array Radar comprises of an Active Antenna Array Unit (AAAU) consisting of a large number of radiating elements, Transmit/Receive (T/R) Modules with other associated RF and digital circuitry and power electronics.  This paper presents mainly the developments in Transmit/Receive (T/R) Module technology, which assimilates various stages of the technological evolution - past, current and futuristic. It discusses how these technologies contribute towards the improvement of efficiency, miniaturization and reliability without compromising its performance parameters

13-bit GaAs serial-to-parallel converter with compact layout for core-chip applications

Design and characterization of a 13 bit serial-to-parallel converter in GaAs technology for smart antennas are presented. The circuit has been realized with NOR-based super-buffered enhancement/depletion logic, and optimized for a compact layout. The serial-to-parallel converter operates properly well above the 20 kHz design clock frequenc

A Novel MMIC 3 phase-state LC switched-filter phase shifter

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