Expanding Rapid Prototyping for Electronic Systems Integration of Arbitrary Form

An innovative method for rapid prototyping (RP) of electronic circuits with components characteristic of typical electronics applications was demonstrated using an enhanced version of a previously developed hybrid stereolithography (SL) and direct write (DW) system, where an existing SL machine was integrated with a three-axis DW fluid dispensing system for combined arbitrary form electronic systems manufacturing. This paper presents initial efforts at embedding functional electronic circuits using the hybrid SL/DW system. A simple temperature-sensitive circuit was selected, which oscillated an LED at a frequency proportional to the temperature sensed by the thermistor. The circuit was designed to incorporate all the required electronic components within a 2.5” x 2” x 0.5” SL part. Electrical interconnects between electronic components were deposited on the SL part with a DW system using silver conductive ink lines. Several inks were deposited, cured, and tested on a variety of SL resin substrates, and the E 1660 ink (Ercon Inc, Wareham, MA) was selected due to its measured lowest average resistivity on the SL substrates. The finished circuit was compared with Printed Circuit Board (PCB) technology for functionality. The electronic components used here include a low voltage battery, LM 555 timer chip, resistors, a thermistor, capacitors, and Light Emitting Diodes (LEDs). This circuit was selected because it (1) represented a simple circuit combining many typically used electronic components and thus provided a useful demonstration for integrated electronic systems manufacturing applicable to a wide variety of devices, and (2) provided an indication of the parasitic resistances and capacitances introduced by the fabrication process due to its sensitivity to manufacturing variation. The hybrid technology can help achieve significant size reductions, enable systems integration in atypical forms, a natural resistance to reverse engineering and possibly increase maximum operating temperatures of electronic circuits as compared to the traditional PCB process. This research demonstrates the ability of the hybrid SL/DW technology for fabricating combined electronic systems for unique electronics applications in which arbitrary form is a requirement and traditional PCB technology cannot be used.Mechanical Engineerin

Printed Circuit Board (PCB) design process and fabrication

This module describes main characteristics of Printed Circuit Boards (PCBs). A brief history of PCBs is introduced in the first chapter. Then, the design processes and the fabrication of PCBs are addressed and finally a study case is presented in the last chapter of the module.Peer ReviewedPostprint (published version

Small Footprint Multilayered Millimeter-Wave Antennas and Feeding Networks for Multi-Dimensional Scanning and High-Density Integrated Systems

This paper overviews the state-of-the-art of substrate integrated waveguide (SIW) techniques in the design and realization of innovative low-cost, low-profile and low-loss (L3) millimeter-wave antenna elements, feeding networks and arrays for various wireless applications. Novel classes of multilayered antenna structures and systems are proposed and studied to exploit the vertical dimension of planar structures to overcome certain limita-tions in standard two-dimensional (2-D) topologies. The developed structures are based on two techniques, namely multi-layer stacked structures and E-plane corners. Differ-ent E-plane structures realised with SIW waveguide are presented, thereby demonstrating the potential of the proposed techniques as in multi-polarization antenna feeding. An array of 128 elements shows low SLL and height gain with just 200g of the total weight. Two versions of 2-D scanning multi-beam are presented, which effectively combine frequency scanning with beam forming networks. Adding the benefits of wide band performance to the multilayer structure, two bi-layer structures are investigated. Different stacked antennas and arrays are demonstrated to optimise the targeted antenna performances in the smallest footprint possible. These structures meet the requirement for developing inexpensive compact millimeter-wave antennas and antenna systems. Different structures and architectures are theoretically and experimentally studied and discussed for specific space- and ground-based appli-cations. Practical issues such as high-density integration and high-volume manufacturability are also addressed

3D Printed Interconnects on Bendable Substrates for 3D Circuits

3D printing systems are expanding to realising fully embedded, multi-purpose, out-of-plane circuits. It is possible to utilise the characteristics of 3D printing to produce customisable, complex and bendable 3D structures and sensors that go beyond the use of standard polymer materials used with the current technology. With multi-material 3D printing, the additive manufacturing could be advanced to produce fully embedded sensors and electronic systems that cannot be otherwise produced in a one-step automated process. Our goals are concentrated towards embedding sensing circuits into next generation prosthetics and robotic arms for more advanced and smoother operation. These devices, along with other similar interests such as healthcare wearable devices, will inevitably include moving parts. Therefore, the embedded printed connections and readout circuits should withstand the repeatable bending of the robotic phalanges or sensing devices without degrading in performance or showing any cracks

The role of printed electronics and related technologies in the development of smart connected products

The emergence of novel materials with flexible and stretchable characteristics, and the use of new processing technologies, have allowed for the development of new connected devices and applications. Using printed electronics, traditional electronic elements are being combined with flexible components and allowing for the development of new smart connected products. As a result, devices that are capable of sensing, actuating, and communicating remotely while being low-cost, lightweight, conformable, and easily customizable are already being developed. Combined with the expansion of the Internet of Things, artificial intelligence, and encryption algorithms, the overall attractiveness of these technologies has prompted new applications to appear in almost every sector. The exponential technological development is currently allowing for the ‘smartification’ of cities, manufacturing, healthcare, agriculture, logistics, among others. In this review article, the steps towards this transition are approached, starting from the conceptualization of smart connected products and their main markets. The manufacturing technologies are then presented, with focus on printing-based ones, compatible with organic materials. Finally, each one of the printable components is presented and some applications are discussed.This work has been supported by NORTE-06-3559- FSE-000018, integrated in the invitation NORTE59-2018-41, aiming the Hiring of Highly Qualified Human Resources, co-financed by the Regional Operational Programme of the North 2020, thematic area of Competitiveness and Employment, through the European Social Fund (ESF), and by the scope of projects with references UIDB/05256/2020 and UIDP/05256/2020, financed by FCT—Fundação para a Ciência e Tecnologia, Portugal

Digitally driven microfabrication of 3D multilayer embedded electronic systems

The integration of multiple digitally driven processes is seen as the solution to many of the current limitations arising from standalone Additive Manufacturing (AM) techniques. A technique has been developed to digitally fabricate fully functioning electronics using a unique combination of AM technologies. This has been achieved by interleaving bottom-up Stereolithography (SL) with Direct Writing (DW) of conductor materials alongside mid-process development (optimising the substrate surface quality), dispensing of interconnects, component placement and thermal curing stages. The resulting process enables the low-temperature production of bespoke three-dimensional, fully packaged and assembled multi-layer embedded electronic circuitry. Two different Digital Light Processing (DLP) Stereolithography systems were developed applying different projection orientations to fabricate electronic substrates by selective photopolymerisation. The bottom up projection orientation produced higher quality more planar surfaces and demonstrated both a theoretical and practical feature resolution of 110 μm. A top down projection method was also developed however a uniform exposure of UV light and planar substrate surface of high quality could not be achieved. The most advantageous combination of three post processing techniques to optimise the substrate surface quality for subsequent conductor deposition was determined and defined as a mid-processing procedure. These techniques included ultrasonic agitation in solvent, thermal baking and additional ultraviolet exposure. SEM and surface analysis showed that a sequence including ultrasonic agitation in D-Limonene with additional UV exposure was optimal. DW of a silver conductive epoxy was used to print conductors on the photopolymer surface using a Musashi dispensing system that applies a pneumatic pressure to a loaded syringe mounted on a 3-axis print head and is controlled through CAD generated machine code. The dispensing behaviour of two isotropic conductive adhesives was characterised through three different nozzle sizes for the production of conductor traces as small as 170 μm wide and 40 μm high. Additionally, the high resolution dispensing of a viscous isotropic conductive adhesive (ICA) also led to a novel deposition approach for producing three dimensional, z-axis connections in the form of high freestanding pillars with an aspect ratio of 3.68 (height of 2mm and diameter of 550μm). Three conductive adhesive curing regimes were applied to printed samples to determine the effect of curing temperature and time on the resulting material resistivity. A temperature of 80 °C for 3 hours resulted in the lowest resistivity while displaying no substrate degradation. ii Compatibility with surface mount technology enabled components including resistors, capacitors and chip packages to be placed directly onto the silver adhesive contact pads before low-temperature thermal curing and embedding within additional layers of photopolymer. Packaging of components as small as 0603 surface mount devices (SMDs) was demonstrated via this process. After embedding of the circuitry in a thick layer of photopolymer using the bottom up Stereolithography apparatus, analysis of the adhesive strength at the boundary between the base substrate and embedding layer was conducted showing that loads up to 1500 N could be applied perpendicular to the embedding plane. A high degree of planarization was also found during evaluation of the embedding stage that resulted in an excellent surface finish on which to deposit subsequent layers. This complete procedure could be repeated numerous times to fabricate multilayer electronic devices. This hybrid process was also adapted to conduct flip-chip packaging of bare die with 195 μm wide bond pads. The SL/DW process combination was used to create conductive trenches in the substrate surface that were filled with isotropic conductive adhesive (ICA) to create conductive pathways. Additional experimentation with the dispensing parameters led to consistent 150 μm ICA bumps at a 457 μm pitch. A flip-chip bonding force of 0.08 N resulted in a contact resistance of 2.3 Ω at a standoff height of ~80 μm. Flip-chips with greater standoff heights of 160 μm were also successfully underfilled with liquid photopolymer using the SL embedding technique, while the same process on chips with 80 μm standoff height was unsuccessful. Finally the approaches were combined to fabricate single, double and triple layer circuit demonstrators; pyramid shaped electronic packages with internal multilayer electronics; fully packaged and underfilled flip-chip bare die and; a microfluidic device facilitating UV catalysis. This new paradigm in manufacturing supports rapid iterative product development and mass customisation of electronics for a specific application and, allows the generation of more dimensionally complex products with increased functionality

Additively Manufactured RF Components, Packaging, Modules, and Flexible Modular Phased Arrays Enabling Widespread Massively Scalable mmWave/5G Applications

The 5G era is here and with it comes many challenges, particularily facing the high frequency mmWave adoption. This is because of the cost to implement such dense networks is much greater due to the high propagation losses of signals that range from 26 GHz to 40 GHz. Therefore there needs to be a way to utilize a method of fabrication that can change with the various environments that 5G will be deployed in, be it dense urban areas or suburban sprawl. In this research, the focus is on making these RF components utilized for 5G at low cost and modular with a focus on additive manufacturing. Since additive manufacturing is a rapid prototyping technique, the technology can be quickly adjusted and altered to meet certain specifications with negligible overhead. Several areas of research will be explored. Firstly, various RF passive components such as additively manufactured antennas and couplers with a combination hybrid inkjet and 3D printing will be discussed. Passive components are critical for evaluating the process of additive manufacturing for high frequency operation. Secondly, various structures will be evaluated specifically for packaging mmWave ICs, including interconnects, smart packaging and encapsulants for use in single or multichip modules. Thirdly, various antenna fabrication techniques will be explored which enables fully integrated ICs with antennas, called System on Antenna (SoA) which utilizes both inkjet and 3D printing to combine antennas and ICs into modules. These modules, can then be built into arrays in a modular fashion, allowing for large or smaller arrays to be assembled on the fly. Finally, a method of calibrating the arrays is introduced, utilizing inkjet printed sensors. This allows the sensor to actively detect bends and deformations in the array and restore optimal antenna array performance. Built for flexible phased arrays, the sensor is designed for implementation for ubiquitous use, meaning that its can be placed on any surface, which enables widespread use of 5G technologies.Ph.D

HIGH FREQUENCY COMMON-MODE NOISE IN SERDES CIRCUITS’ OPTIMIZED INTERCONNECTIONS

According to the requirements imposed by the new four-level pulse amplitude modulation (PAM4) standard for high-speed data transfer and processing, electrical constraints and manufacturing tolerances in integrated electronic packages impose accurate electromagnetic simulations and new S-parameters analysis, saving time and financial resources for next-generation switches, routers or data centers circuits implementation. The complexity of the advanced networking class circuits’ encapsulation substrates massively increases due to the large number of differential signals that it integrates. Differential signaling has replaced single-ended transmission in high-speed circuits due to their many advantages, including increased immunity to crosstalk and electromagnetic interference, but common-mode noise due to timing skew or amplitude unbalance differences can still affect them. This work tests five different models, identifies and optimizes the 45° bends, structures that commonly affect the reflections in a differential stripline. Then it studies differential transmission lines in stripline topology, implemented in a 12-layered flip-chip package, using S-parameters, inspecting and comparing the common-mode noise. In this way, the paper combines microwave theory with a real chip packaging design in an innovative way, using finite element analysis of electromagnetic field simulation and mixed-mod scattering parameters of differential topologies, towards an optimized structure design

Mechanics of Non Planar Interfaces in Flip-Chip Interconnects

With the continued proliferation of low cost, portable consumer electronic products with greater functionality, there is increasing demand for electronic packaging that is smaller, lighter and less expensive. Flip chip is an essential enabling technology for these products. The electrical connection between the chip I/O and substrate is achieved using conductive materials, such as solder, conductive epoxy, metallurgy bump (e.g., gold) and anisotropic conductive adhesives. The interconnect regions of flip-chip packages consists of highly dissimilar materials to meet their functional requirements. The mismatches in properties, contact morphology and crystal orientation at those material interfaces make them vulnerable to failure through delamination and crack growth under various loading patterns. This study encompasses contact between deformable bodies, bonding at the asperities and fracture properties at interfaces formed by the interconnects of flip-chip packages. This is achieved through experimentation and modeling at different length scales, to be able to capture the detailed microstructural features and contact mechanics at interfaces typically found in electronic systems