55 research outputs found

    Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

    Get PDF
    This paper presents a multi-channel dual-mode CMOS analogue front-end (AFE) for electrochemical and bioimpedance analysis. Current-mode and voltage-mode readouts, integrated on the same chip, can provide an adaptable platform to correlate single-cell biosensor studies with large-scale tissue or organ analysis for real-time cancer detection, imaging and characterization. The chip, implemented in a 180-nm CMOS technology, combines two current-readout (CR) channels and four voltage-readout (VR) channels suitable for both bipolar and tetrapolar electrical impedance spectroscopy (EIS) analysis. Each VR channel occupies an area of 0.48 mm 2 , is capable of an operational bandwidth of 8 MHz and a linear gain in the range between -6 dB and 42 dB. The gain of the CR channel can be set to 10 kΩ, 50 kΩ or 100 kΩ and is capable of 80-dB dynamic range, with a very linear response for input currents between 10 nA and 100 μ A. Each CR channel occupies an area of 0.21 mm 2 . The chip consumes between 530 μ A and 690 μ A per channel and operates from a 1.8-V supply. The chip was used to measure the impedance of capacitive interdigitated electrodes in saline solution. Measurements show close matching with results obtained using a commercial impedance analyser. The chip will be part of a fully flexible and configurable fully-integrated dual-mode EIS system for impedance sensors and bioimpedance analysis

    A 32-by-32 CMOS microelectrode array for capacitive biosensing and impedance spectroscopy

    Get PDF
    This paper presents the design of a 1024-channel dual-modality CMOS biosensor suitable for both capacitive sensing and impedance spectroscopy. The chip serves as a platform for detection, localization and monitoring of bacteria and can be adopted for affinity-based assays. The chip features a 32×32 array of unpassivated metal electrodes formed on the top metal of a 0.18μm CMOS process, with an overall sensing area of 2.06 mm2. The system design is based on a shared in-pixel integrator that can be used as a charge amplifier for capacitive sensing (CS) or as part of a transimpedance amplifier for electrical impedance spectroscopy (EIS). The CS mode is capable of a operation bandwidth of 50 MHz at a current consumption of 82 μA per pixel. The EIS channel operates over a bandwidth between 100 Hz and 1 MHz with a total input-referred current noise of 48 pArms and a current consumption of 210 μA per channel

    Wide-band compact 1.8 V-0.18 µm CMOS analog front-end for impedance spectroscopy

    Get PDF
    In this letter, a fully integrated configurable front-end for Impedance Spectroscopy (IS) is presented. The circuit includes fully differential in-phase and quadrature channels, using a transconductor (TC)-transimpedance (TI) approach. The input TC, shared for both channels, is based on a programmable degenerated differential pair to attain low-noise programmable-gain, while identical TII/Q with embedded synchronous rectification provide both I, Q outputs, filtered through fc adjustable Gm-C integrators. It exhibits a programmable gain ranging from 0 dB to 40 dB with 87 MHz bandwidth, amplitude and phase recovery errors below 1.9% and 2.5∘ respectively and an input referred noise floor of 16.7 nV/Hz. The result is a high-performance very compact topology with a total power consumption of 292 μW at a 1.8 V power supply, thus constituting an appropriate solution for full on chip multichannel IS systems

    Mixing Integrator for Compact Electrochemical Impedance Spectroscopy

    Get PDF
    With the rapid development in the miniaturization and monolithic integration of electrochemical sensors with integrated microchips on semiconductor technology, the power and area efficiency of the instrumentation circuits have become an emerging interest. Electrochemical Impedance Spectroscopy (EIS) is an analytical technique widely used in electrochemistry to investigate the properties of materials and electrode reactions. A conventional frequency-response analyzer (FRA) is a powerful EIS measurement instrument composed of amplification, mixing, and low-pass filtering blocks. This paper presents a resetting timing scheme in an integrating amplifier with capacitive feedback for combining three functions into one circuit. The proposed method benefits from lower power consumption and reduced silicon area occupation, as well as eases the design complexity. The theoretical principle of timing selection is expressed in mathematical equations and verified by the circuit simulations

    Time Stamp – A Novel Time-to-Digital Demodulation Method for Bioimpedance Implant Applications

    Get PDF
    Bioimpedance analysis is a noninvasive and inexpensive technology used to investigate the electrical properties of biological tissues. The analysis requires demodulation to extract the real and imaginary parts of the impedance. Conventional systems use complex architectures such as I-Q demodulation. In this paper, a very simple alternative time-to-digital demodulation method or ‘time stamp’ is proposed. It employs only three comparators to identify or stamp in the time domain, the crossing points of the excitation signal, and the measured signal. In a CMOS proof of concept design, the accuracy of impedance magnitude and phase is 97.06% and 98.81% respectively over a bandwidth of 10 kHz to 500 kHz. The effect of fractional-N synthesis is analysed for the counter-based zero crossing phase detector obtaining a finer phase resolution (0.51˚ at 500 kHz) using a counter clock frequency ( fclk = 12.5 MHz). Because of its circuit simplicity and ease of transmitting the time stamps, the method is very suited to implantable devices requiring low area and power consumption

    CMOS Electrochemical Camera for Biological Cell Impedance Imaging

    Get PDF
    Many biomedical applications require observing the response of biological cells to various stimuli and conditions. Typical optical imaging systems for observing cells require labelling cells with fluorescent molecules. These systems have drawbacks such as limited luminescence time and light-induced damage. However, use of electrochemical based measurement methods overcome these issues. One method, which is label-free and non-invasive, is impedance spectroscopy (IS), which tracks impedance changes caused by variations in cell membrane properties. This thesis describes the design and experimental characterization of a CMOS electrochemical camera for biological cell impedance imaging. The electrochemical camera is fabricated in a 0.18-um CMOS technology, and is the first to implement a row-parallel architecture which improves upon spatial-readout efficiency compared to previously published work. Two integrated microelectrode arrays, one containing 17x11 40x40 um^2 electrodes and the other containing 70x40 10x10 um^2 electrodes, are implemented. Each array is connected to 84 integrated row-parallel lock-in amplifiers to measure the impedance of live cells on the electrode array surface. A novel lock-in amplifier design allows for an electrode pitch of only 20 um. The design of a custom bench-top measurement system for characterizing the performance of the CMOS electrochemical camera is also described. Experimental electronic characterization of the electrochemical camera shows that it can operate from 1 kHz to 1 MHz at a frame rate of 0.0117 Hz, which is sufficient for several cell imaging applications. The measured input-referred noise is 1.08 nArms with an applied input signal at 600 kHz. Compared to previously reported CMOS electrochemical sensor arrays, the presented work consumes the smallest channel area for the sensor readout electronics with integrated analog-to-digital converter, the lowest power consumption per channel for operating frequencies greater than 100 kHz, and the best area-readout figure of merit

    Modeling and Characteristic Study of Thin Film Based Biosensor Based on COMSOL

    Get PDF
    The model of thin film based biosensor is built based on COMSOL in order to simulate and optimize the electronic characteristic of dipolar electrodes system and tetrapolar electrodes system. Zones of negative sensitivity exist between current carrying electrodes and voltage measuring electrodes while the polarization occurs at the edges of electrodes. By changing the parameters embracing distance between electrodes, thickness of electrodes, and the width of inner electrodes (for tetrapolar electrodes system only), the polarization and zones of negative sensitivity can be receded to some extent, which improves the system’s performance. Tetrapolar electrodes system has less polarization but more negative-sensitivity zones compared to dipolar electrodes system and different setups response differently to these changing parameters

    A Low Power Mid-Rail Dual Slope Analog-To-Digital Converter for Biomedical Instrumentation

    Get PDF
    There are an estimated 15 million babies born preterm every year and it is on the rise. The complications that arise from this can be quite severe and are the leading causes of death among children under 5 years of age. Among these complications is a condition known as apnea. This disorder is defined as the suspension of breathing during sleep for usually 10 to 30 seconds and can occur up to 20-30 times per hour for preterm infants. This lack of oxygen in the bloodstream can have troubling effects, such as brain damage and death if the apnea period is longer than expected. This creates a dire need to continuously monitor the respiration state of babies born prematurely. Given that the breathing signal is in analog form, a conversion to its digital counterpart is necessary.In this thesis, a novel low power analog-to-digital converter (ADC) for the digitization and analyzation of the respiration signal is presented. The design of the ADC demonstrates an innovative approach on how to operate on a single polarity supply system, which effectively doubles the sampling speed. The ADC has been realized in a standard 130 nm CMOS process

    CMOS Design of Reconfigurable SoC Systems for Impedance Sensor Devices

    Get PDF
    La rápida evolución en el campo de los sensores inteligentes, junto con los avances en las tecnologías de la computación y la comunicación, está revolucionando la forma en que recopilamos y analizamos datos del mundo físico para tomar decisiones, facilitando nuevas soluciones que desempeñan tareas que antes eran inconcebibles de lograr.La inclusión en un mismo dado de silicio de todos los elementos necesarios para un proceso de monitorización y actuación ha sido posible gracias a los avances en micro (y nano) electrónica. Al mismo tiempo, la evolución de las tecnologías de procesamiento y micromecanizado de superficies de silicio y otros materiales complementarios ha dado lugar al desarrollo de sensores integrados compatibles con CMOS, lo que permite la implementación de matrices de sensores de alta densidad. Así, la combinación de un sistema de adquisición basado en sensores on-Chip, junto con un microprocesador como núcleo digital donde se puede ejecutar la digitalización de señales, el procesamiento y la comunicación de datos proporciona características adicionales como reducción del coste, compacidad, portabilidad, alimentación por batería, facilidad de uso e intercambio inteligente de datos, aumentando su potencial número de aplicaciones.Esta tesis pretende profundizar en el diseño de un sistema portátil de medición de espectroscopía de impedancia de baja potencia operado por batería, basado en tecnologías microelectrónicas CMOS, que pueda integrarse con el sensor, proporcionando una implementación paralelizable sin incrementar significativamente el tamaño o el consumo, pero manteniendo las principales características de fiabilidad y sensibilidad de un instrumento de laboratorio. Esto requiere el diseño tanto de la etapa de gestión de la energía como de las diferentes celdas que conforman la interfaz, que habrán de satisfacer los requisitos de un alto rendimiento a la par que las exigentes restricciones de tamaño mínimo y bajo consumo requeridas en la monitorización portátil, características que son aún más críticas al considerar la tendencia actual hacia matrices de sensores.A nivel de celdas, se proponen diferentes circuitos en un proceso CMOS de 180 nm: un regulador de baja caída de voltaje como unidad de gestión de energía, que proporciona una alimentación de 1.8 V estable, de bajo ruido, precisa e independiente de la carga para todo el sistema; amplificadores de instrumentación con una aproximación completamente diferencial, que incluyen una etapa de entrada de voltaje/corriente configurable, ganancia programable y ancho de banda ajustable, tanto en la frecuencia de corte baja como alta; un multiplicador para conformar la demodulación dual, que está embebido en el amplificador para optimizar consumo y área; y filtros pasa baja totalmente integrados, que actúan como extractores de magnitud de DC, con frecuencias de corte ajustables desde sub-Hz hasta cientos de Hz.<br /
    • …
    corecore