Analysis and Design of a Sub-THz Ultra-Wideband Phased-Array Transmitter

This thesis investigates circuits and systems for broadband high datarate transmitter systems in the millimeter-wave (mm-wave) spectrum. During the course of this dissertation, the design process and characterization of a power efficient and wideband binary phase-shift keying (BPSK) transmitter integrated circuit (IC) with local oscillator (LO) frequency multiplication and 360° phase control for beam steering is studied. All required circuit blocks are designed based on the theoretical analysis of the underlying principles, optimized, fabricated and characterized in the research laboratory targeting low power consumption, high efficiency and broadband operation. The phase-controlled push-push (PCPP) architecture enabling frequency multiplication by four in a single stage is analytically studied and characterized finding an optimum between output power and second harmonic suppression depending on the input amplitude. A PCPP based LO chain is designed. A circuit is fabricated establishing the feasibility of this architecture for operation at more than 200 GHz. Building on this, a second circuit is designed, which produces among the highest saturated output powers at 2 dBm. At less than 100 mW of direct current (DC) power consumption, this results in a power-added efficiency (PAE) of 1.6 % improving the state of the art by almost 30 %. Phase-delayed and time-delayed approaches to beam steering are analyzed, identifying and discussing design challenges like area consumption, signal attenuation and beam squint. A 60 GHz active vector-sum phase-shifter with high gain of 11.3 dB and output power of 5 dBm, improving the PAE of the state of the art by a factor of 30 achieving 6.29 %, is designed. The high gain is possible due to an optimization of the orthogonal signal creation stage enabled by studying and comparing different architectures leading to a trade off of lower signal attenuation for higher area consumption in the chosen electromagnetic coupler. By combining this with a frequency quadrupler, a phase steering enabled LO chain for operation at 220 GHz is created and characterized, confirming the preceding analysis of the phase-frequency relation during multiplication. It achieves a power gain of 21 dB, outperforming comparable designs by 25 dB. This allows the combination of phase control, frequency multiplication and pre-amplification. The radio frequency (RF) efficiency is increased 40-fold to 0.99 %, with a total power consumption of 105 mW. Motivated by the distorting effect of beam squint in phase-delayed broadband array systems, a novel analog hybrid beam steering architecture is devised, combining phase-delayed and time-delayed steering with the goal of reducing the beam squint of phase-delayed systems and large area consumption of time-delayed circuits. An analytical design procedure is presented leading to the research finding of a beam squint reduction potential of more than 83 % in an ideal system. Here, the increase in area consumption is outweighed by the reduction in beam squint. An IC with a low power consumption of 4.3 mW has been fabricated and characterized featuring the first time delay circuit operating at above 200 GHz. By producing most of the beam direction by means of time delay the beam squinting can be reduced by more than 75 % in measurements while the subsequent phase shifter ensures continuous beam direction control. Together, the required silicon area can be reduced to 43 % compared to timedelayed systems in the same frequency range. Based on studies of the optimum signal feeding and input matching of a Gilbert cell, an ultra-wideband, low-power mixer was designed. A bandwidth of more than 100 GHz was achieved exceeding the state of the art by 23 %. With a conversion gain of –13 dB, this enables datarates of more than 100 Gbps in BPSK operation. The findings are consolidated in an integrated transmitter operating around 246 GHz doubling the highest published measured datarates of transmitters with LO chain and power amplifier in BPSK operation to 56 Gbps. The resulting transmitter efficiency of 7.4 pJ/bit improves the state of the art by 70 % and 50 % over BPSK and quadrature phaseshift keying (QPSK) systems, respectively. Together, the results of this work form the basis for low-power and efficient next-generation wireless applications operating at many times the datarates available today.:Abstract 3 Zusammenfassung 5 List of Symbols 11 List of Acronyms 17 Prior Publications 19 1. Introduction 21 1.1. Motivation........................... 21 1.2. Objective of this Thesis ................... 25 1.3. Structure of this Thesis ................... 27 2. Overview of Employed Technologies and Techniques 29 2.1. IntegratedCircuitTechnology................ 29 2.2. Transmission Lines and Passive Structures . . . . . . . . 35 2.3. DigitalModulation ...................... 41 3. Frequency Quadrupler 45 3.1. Theoretical Analysis of Frequency Multiplication Circuits 45 3.2. Phase-Controlled Push-Push Principle for Frequency Quadrupling.......................... 49 3.3. Stand-alone Phase-Controlled Push-Push Quadrupler . 60 3.4. Phase-Controlled Push-Push Quadrupler based LO-chain with High Output Power ............... 72 9 4. Array Systems and Dynamic Beam Steering 91 4.1. Theoretical Analysis of BeamSteering. . . . . . . . . . . 95 4.2. Local Oscillator Phase Shifting with Vector-Modulator PhaseShifters......................... 107 4.3. Hybrid True-Time and Phase-Delayed Beam Steering . 131 5. Ultra-Wide Band Modulator for BPSK Operation 155 6. Broadband BPSK Transmitter System for Datarates up to 56 Gbps 167 6.1. System Architecture ..................... 168 6.2. Measurement Technique and Results . . . . . . . . . . . 171 6.3. Summary and performance comparison . . . . . . . . . 185 7. Conclusion and Outlook 189 A. Appendix 195 Bibliography 199 List of Figures 227 Note of Thanks 239 Curriculum Vitae 241Diese Dissertation untersucht Schaltungen und Systeme für breitbandige Transmittersysteme mit hoher Datenrate im Millimeterwellen (mm-wave) Spektrum. Im Rahmen dieser Arbeit werden der Entwurfsprozess und die Charakterisierung eines leistungseffizienten und breitbandigen integrierten Senders basierend auf binärer Phasenumtastung (BPSK) mit Frequenzvervielfachung des Lokaloszillatorsignals und 360°-Phasenkontrolle zur Strahlsteuerung untersucht. Alle erforderlichen Schaltungsblöcke werden auf Grundlage von theoretischen Analysen der zugrundeliegenden Prinzipien entworfen, optimiert, hergestellt und im Forschungslabor charakterisiert, mit den Zielen einer niedrigen Leistungsaufnahme, eines hohen Wirkungsgrades und einer möglichst großen Bandbreite. Die phasengesteuerte Push-Push (PCPP)-Architektur, welche eine Frequenzvervierfachung in einer einzigen Stufe ermöglicht, wird analytisch untersucht und charakterisiert. Dabei wird ein Optimum zwischen Ausgangsleistung und Unterdrückung der zweiten Harmonischen des Eingangssignals in Abhängigkeit von der Eingangsamplitude gefunden. Es wird eine LO-Kette auf PCPP-Basis entworfen. Eine Schaltung wird präsentiert, die die Machbarkeit dieser Architektur für den Betrieb bei mehr als 200 GHz nachweist. Darauf aufbauend wird eine zweite Schaltung entworfen, die mit 2 dBm eine der höchsten publizierten gesättigten Ausgangsleistungen erzeugt. Mit einer Leistungsaufnahme von weniger als 100mW ergibt sich ein Leistungswirkungsgrad (PAE) von 1.6 %, was den Stand der Technik um fast 30 % verbessert. Es werden phasenverzögerte und zeitverzögerte Ansätze zur Steuerung der Strahlrichtung analysiert, wobei Entwicklungsherausforderungen wie Flächenverbrauch, Signaldämpfung und Strahlschielen identifiziert und diskutiert werden. Ein aktiver Vektorsummen-Phasenschieber mit hoher Verstärkung von 11.3 dB und einer Ausgangsleistung von 5 dBm, der mit einer PAE von 6.29 % den Stand der Technik um den Faktor 30 verbessert, wird entworfen. Die hohe Verstärkung ist zum Teil auf eine Optimierung der orthogonalen Signalerzeugungsstufe zurückzuführen, die durch die Untersuchung und den Vergleich verschiedener Architekturen ermöglicht wird. Bei der Entscheidung für einen elektromagnetischen Koppler rechtfertigt die geringere Signaldämpfung einen höheren Flächenverbrauch. Durch die Kombination mit einem Frequenzvervierfacher wird eine LO-Kette mit Phasensteuerung für den Betrieb bei 220 GHz geschaffen und charakterisiert, was die vorangegangene Analyse der Phasen-FrequenzBeziehung während der Multiplikation bestätigt. Sie erreicht einen Leistungsgewinn von 21 dB und übertrifft damit vergleichbare Designs um 25dB. Dies ermöglicht die Kombination von Phasensteuerung, Frequenzvervielfachung und Vorverstärkung. Der HochfrequenzWirkungsgrad wird um das 40-fache auf 0.99 % bei einer Gesamtleistungsaufnahme von 105 mW gesteigert. Motiviert durch den verzerrenden Effekt des Strahlenschielens in phasengesteuerten Breitbandarraysystemen, wird eine neuartige analoge hybride Strahlsteuerungsarchitektur untersucht, die phasenverzögerte und zeitverzögerte Steuerung kombiniert. Damit wird sowohl das Strahlenschielen phasenverzögerter Systeme als auch der große Flächenverbrauch zeitverzögerter Schaltungen reduziert. Es wird ein analytisches Entwurfsverfahren vorgestellt, das zu dem Forschungsergebnis führt, dass in einem idealen System ein Potenzial zur Reduktion des Strahlenschielens von mehr als 83 % besteht. Dabei wird die Zunahme des Flächenverbrauchs durch die Verringerung des Strahlenschielens aufgewogen. Es wird ein IC mit einer geringen Leistungsaufnahme von 4.3mW hergestellt und charakterisiert. Dabei wird die erste Zeitverzögerungsschaltung entworfen, die bei über 200 GHz arbeitet. Durch die Erzeugung eines Großteils der Strahlrichtung mittels Zeitverzögerung kann das Schielen des Strahls bei Messungen um mehr als 75% reduziert werden, während der nachfolgende Phasenschieber eine kontinuierliche Steuerung der Strahlrichtung gewährleistet. Insgesamt kann die benötigte Siliziumfläche im Vergleich zu zeitverzögerten Systemen im gleichen Frequenzbereich auf 43 % reduziert werden. Auf der Grundlage von Studien zur optimalen Signaleinspeisung und Eingangsanpassung einer Gilbert-Zelle wird ein Ultrabreitband-Mischer mit geringem Stromverbrauch entworfen. Dieser erreicht eine Ausgangsbandbreite von mehr als 100 GHz, die den Stand der Technik um 23% übertrifft. Bei einer Wandlungsverstärkung von –13dB ermöglicht dies Datenraten von mehr als 100 Gbps im BPSK-Betrieb. Die Erkenntnisse werden in einem integrierten, breitbandigen Sender konsolidiert, der um 246 GHz arbeitet und die höchsten veröffentlichten gemessenen Datenraten für Sender mit LO-Signalkette und Leistungsverstärker im BPSK-Betrieb auf 56 Gbps verdoppelt. Die daraus resultierende Transmitter-Effizienz von 7.4 pJ/bit verbessert den Stand der Technik um 70 % bzw. 50 % gegenüber BPSKund Quadratur Phasenumtastung (QPSK)-Systemen. Zusammen bilden die Ergebnisse dieser Arbeit die Grundlage für stromsparende, effiziente, mobile Funkanwendungen der nächsten Generation mit einem Vielfachen der heute verfügbaren Datenraten.:Abstract 3 Zusammenfassung 5 List of Symbols 11 List of Acronyms 17 Prior Publications 19 1. Introduction 21 1.1. Motivation........................... 21 1.2. Objective of this Thesis ................... 25 1.3. Structure of this Thesis ................... 27 2. Overview of Employed Technologies and Techniques 29 2.1. IntegratedCircuitTechnology................ 29 2.2. Transmission Lines and Passive Structures . . . . . . . . 35 2.3. DigitalModulation ...................... 41 3. Frequency Quadrupler 45 3.1. Theoretical Analysis of Frequency Multiplication Circuits 45 3.2. Phase-Controlled Push-Push Principle for Frequency Quadrupling.......................... 49 3.3. Stand-alone Phase-Controlled Push-Push Quadrupler . 60 3.4. Phase-Controlled Push-Push Quadrupler based LO-chain with High Output Power ............... 72 9 4. Array Systems and Dynamic Beam Steering 91 4.1. Theoretical Analysis of BeamSteering. . . . . . . . . . . 95 4.2. Local Oscillator Phase Shifting with Vector-Modulator PhaseShifters......................... 107 4.3. Hybrid True-Time and Phase-Delayed Beam Steering . 131 5. Ultra-Wide Band Modulator for BPSK Operation 155 6. Broadband BPSK Transmitter System for Datarates up to 56 Gbps 167 6.1. System Architecture ..................... 168 6.2. Measurement Technique and Results . . . . . . . . . . . 171 6.3. Summary and performance comparison . . . . . . . . . 185 7. Conclusion and Outlook 189 A. Appendix 195 Bibliography 199 List of Figures 227 Note of Thanks 239 Curriculum Vitae 24

Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz

This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d

MILLIMETER-WAVE QUADRATURE RECEIVERS FOR ATMOSPHERIC SENSING AND RADIOMETRY

The objective of this research is to investigate the design challenges of millimeter wave (mm-wave) quadrature receivers for emerging applications and develop new ideas to ad- dress these challenges. Next-generation wireless networks, satellite communications, atmospheric sensing instruments, autonomous vehicle radars, and body scanners are targeting to operate at mm-wave frequencies, and high-performance electronics are needed to enable these technologies. In this research, we investigate novel circuit topologies to improve the performance of existing mm-wave quadrature receivers, particularly for radiometry and remote sensing applications. A transformer-based front-end switch is co- designed with an LNA where the transformer acts as the input matching network of the LNA, reducing the front-end loss and system noise figure. Broadband and low-loss quadrature signal generation networks are proposed to provide highly balanced quadrature signals to reject the image frequency content. In addition, a high-efficiency frequency multiplier topology is demonstrated, achieving superior performance compared to the state-of-the-art designs. Lastly, the reliability and noise performance of on-chip noise source devices (PN junctions) in a SiGe BiCMOS platform was characterized and compared. To confirm the advantages of our ideas, the measurement and simulation results of all fabricated circuits are presented and discussed.Ph.D

Millimeter-Wave Concurrent Dual-Band BiCMOS RFIC Transmitter for Radar and Communication Systems

This dissertation presents new circuit architectures and techniques for improving the performance of several key BiCMOS RFIC building blocks used in radar and wireless communication systems operating up to millimeter-wave frequencies, and the development of an advanced, low-cost and miniature millimeter-wave concurrent dual-band transmitter for short-range, high-resolution radar and high-rate communication systems. A new type of low-power active balun consisting of a common emitter amplifier with degenerative inductor and a common collector amplifier is proposed. The parasitic neutralization and compensation techniques are used to keep the balun well balanced at very high frequencies and across an ultra-wide bandwidth. A novel RF switch architecture with ultra-high isolation and possible gain is proposed, analyzed and demonstrated. The new RF switch architecture achieves an ultra-high isolation through implementation of a new RF leaking cancellation technique. A new class of concurrent dual-band impedance matching networks and technique for synthesizing them are presented together with a 25.5/37-GHz concurrent dual-band PA. These matching networks enable simultaneous matching of two arbitrary loads to two arbitrary sources at two different frequencies, utilizing the impedance-equivalence properties of LC networks that any LC network can be equivalent to an inductor, capacitor, open or short at different frequencies. K- and Ka-band ultra-low-leakage RF-pulse formers capable of producing very narrow RF pulses in the order of 200 ps with small rising and falling time for short-range high-resolution radar and high-data-rate communication systems are also developed. The complete transmitter exhibiting unique characteristics obtained from capabilities of producing very narrow and tunable RF pulses with extremely RF leakage and working concurrently in dual bands at 24.5 and 35 GHz was designed. Capability of generating narrow and tunable RF pulses allows the radar system to flexibly work at high and multiple range resolutions. The extremely low RF leakage allows the transmitter to share one antenna system with receiver, turn on the PA at all time, comply the transmitting spectrum requirements, increase the system dynamic range, avoid harming to other systems; hence improving system size, cost and performance. High data-rate in communication systems is achieved as the consequence of transmitting very narrow RF pulses at high rates. In addition, the dissertation demonstrates a design approach for low chip-area, cost and power consumption systems in which a single dual-band component (power amplifier) is designed to operate with two RF signals simultaneously

Integrated Circuits and Systems for Millimeter-Wave Frequencies

In the first section of this thesis, mm-wave circuit- and system-level solutions for addition of multi-user service to conventional multi-antenna phased array architectures will be introduced. The proposed architecture will enhance the link capacity, co-channel user service and hardware cost compared to conventional solutions. Theory and design of the circuits and system are detailed and comprehensive measurement results are presented verifying the system-level functionality. First section is named A Millimeter-Wave Partially-Overlapped Beamforming-MIMO Receiver: Theory, Design, and Implementation. More specifically, this section presents an analysis and design of a partially-overlapped beamforming-MIMO architecture capable of achieving higher beamforming and spatial multiplexing gains with lower number of elements compared to conventional architectures. As a proof of concept, a 4-element beamforming-MIMO receiver (RX) covering 64-67 GHz frequency band enabling 2-stream concurrent reception is designed and measured. By partitioning the RX elements into two clusters and partially overlapping these clusters to create two 3-element beamformers, both phased-array (coherent beamforming) as well as MIMO (spatial multiplexing) features are simultaneously acquired. 6-bit phase shifters with 360° phase control and 5-bit VGAs with 11 dB range are designed to enable steering of the two RX clusters toward two arbitrary angular locations corresponding to two users. Fabricated in a 130-nm SiGe BiCMOS process, the RX achieves a 30.15 dB maximum direct conversion gain and a 9.8 dB minimum noise figure (NF) across 548 MHz IF bandwidth. S-parameter-based array factor measurements verify spatial filtering of the interference and spatial multiplexing in this RX chip.In the second section of this thesis, energy-efficient ultra-high speed transceiver architectures will be presented. Current high-speed transceivers rely on high-sampling-rate high-resolution power-hungry analog-to-digital converters or digital-to-analog converters at the interface of analog and digital circuitries. However, design of these backend data-converters are extremely power-hungry at very high speeds in a fully-integrated end-to-end scenario (i.e. RF-to-Bits, Bits-to-RF). Novel system-level architectures will be presented that obviate the need for such costly data converters and will significantly relax the complexity of digital signal-processing. The proposed architecture will result in orders of magnitude energy saving at ultra-high speeds. Theory, design, and measurement results of the highest-speed, highly energy-efficient fully-integrated end-to-end transceiver will be discussed in this section. Second section is named A Millimeter-Wave Energy-Efficient Direct-Demodulation Receiver: Theory, Design, and Implementation. More precisely, this section presents the theory, design, and implementation of an 8PSK direct-demodulation receiver based on a novel multi-phase RF-correlation concept. The output of this RF-to-bits receiver architecture is demodulated bits, obviating the need for power-hungry high-speed-resolution data converters. A single-channel 115-135-GHz receiver prototype was fabricated in a 55-nm SiGe BiCMOS process. A max conversion gain of 32 dB and a min noise figure (NF) of 10.3 dB was measured. A data-rate of 36 Gbps was wirelessly measured at 30 cm distance with the received 8PSK signal being directly demodulated on-chip at a bit-error-rate (BER) of 1e-6. The measured receiver sensitivity at this BER is -41.28 dBm. The prototype occupies 2.5 by 3.5 mm squared of die area including PADs and test circuits (2.5 mm squared active area) and consumes a total DC power of 200.25 mW

Integrated RF oscillators and LO signal generation circuits

This thesis deals with fully integrated LC oscillators and local oscillator (LO) signal generation circuits. In communication systems a good-quality LO signal for up- and down-conversion in transmitters is needed. The LO signal needs to span the required frequency range and have good frequency stability and low phase noise. Furthermore, most modern systems require accurate quadrature (IQ) LO signals. This thesis tackles these challenges by presenting a detailed study of LC oscillators, monolithic elements for good-quality LC resonators, and circuits for IQ-signal generation and for frequency conversion, as well as many experimental circuits. Monolithic coils and variable capacitors are essential, and this thesis deals with good structures of these devices and their proper modeling. As experimental test devices, over forty monolithic inductors and thirty varactors have been implemented, measured and modeled. Actively synthesized reactive elements were studied as replacements for these passive devices. At first glance these circuits show promising characteristics, but closer noise and nonlinearity analysis reveals that these circuits suffer from high noise levels and a small dynamic range. Nine circuit implementations with various actively synthesized variable capacitors were done. Quadrature signal generation can be performed with three different methods, and these are analyzed in the thesis. Frequency conversion circuits are used for alleviating coupling problems or to expand the number of frequency bands covered. The thesis includes an analysis of single-sideband mixing, frequency dividers, and frequency multipliers, which are used to perform the four basic arithmetical operations for the frequency tone. Two design cases are presented. The first one is a single-sideband mixing method for the generation of WiMedia UWB LO-signals, and the second one is a frequency conversion unit for a digital period synthesizer. The last part of the thesis presents five research projects. In the first one a temperature-compensated GaAs MESFET VCO was developed. The second one deals with circuit and device development for an experimental-level BiCMOS process. A cable-modem RF tuner IC using a SiGe process was developed in the third project, and a CMOS flip-chip VCO module in the fourth one. Finally, two frequency synthesizers for UWB radios are presented

SiGe based multiple-phase VCO operating for mm-wave frequencies

The ever-increasing demand for higher speed in wireless consumer applications has increased the interest in the unlicensed spectrum of 7 GHz around 60 GHz. The high atmospheric oxygen absorption at 60 GHz and small size of the antennas at this frequency requires the use of integrated phased-array systems to overcome the deficiencies of lossy channels at these frequencies. The phased arrays combine signals from multiple paths to obtain higher receiver sensitivity and directivity. The system thus requires phase-shifted voltage-controlled oscillator (VCO) signals to implement phase shifting in the local-oscillator (LO) path. In this research, the vector sum method to generate various phases of the signal at 60 GHz was investigated for its suitability in phased-array systems. The main focus was on improving the phase noise performance of the VCO. The VCO was implemented using a fully differential common-collector Colpitts oscillator in the cascode configuration, which was found to be the VCO configuration with acceptable phase noise performance and stability in the millimetre-wave range. The research focus was on modelling the phase noise of the VCO, and was performed by identifying the impulse sensitivity function for various noise sources, followed by analysing its effect on the linear time varying (LTV) model of the oscillators. The analysis led to a closed-form expression for the phase noise of the oscillator in terms of process and design parameters. The design was then optimised in terms of identified parameters to attain minimum phase noise. The phase noise expression using LTV theory and SpectreRF simulations reported the same optimum value for the design parameter, of around 0.3 for the capacitor ratio. The simulation results utilising the vector sum phase shifting method to generate multiple phase oscillator signals suggest its suitability in implementing phased-array systems in the millimetre-wave range. The vector sum was realised by generating quadrature signals from the oscillator using hybrid couplers. Variable gain amplifiers (VGAs) based on Gilbert mixer topology were used to combine the in-phase and quadrature phase signals to generate the phase-shifted oscillator signal. The gains of the VGAs were linearised by using a pre-distortion circuit, which was an inverse tanh cell. A fully differential 60 GHz VCO was fabricated using a SiGe process with a fT of 200 GHz. The fabricated integrated circuit (IC) measured at the wafer level had a centre frequency of 52.8 GHz and a tuning range of 7 GHz. It demonstrated a phase noise performance of -98.9 dBc/Hz at 1 MHz offset and a power dissipation of 140 mW, thus providing a VCO figure of merit of 172 dBc/Hz. It delivered a differential output power of 8 dBm and the IC occupied an area of 0.54 mm2, including the bondpads. It was thus concluded that a 10 % design margin for the tuning range is required while using SiGe BiCMOS technology. The simulation results demonstrate that the VCO, along with an active interpolator, provides a range of phase-shifted signals from 0° to 360° in steps of 22.5° for various gain settings of the VGAs. The power dissipation of the active interpolator is around 60 mW and the system could thus be employed in LO path shifting architecture of the phased arrays with increased power consumption.Thesis (PhD)--University of Pretoria, 2013.Electrical, Electronic and Computer Engineeringunrestricte

D-Band downconversion mixer design in CMOS-SOI

Abstract. The current surge in research interest around the sub-THz frequency region comes as a no surprise. The potential for greater data rates and available bandwidths are just a couple reasons why research around these frequencies should be prioritized. Many viable receiver structures have been presented for these frequency regions, but they all have one thing in common: They all include a downconversion mixer. The mixer is a crucial piece in the receiver structure, converting the higher frequency radio frequency (RF) signal to a much lower intermediate frequency (IF) signal using multiplication with a local oscillator (LO) signal. The resulting waveform is much easier to handle for signal processing that comes after. The downconversion should be able to provide a fair amount of gain to the converted signal on a wide range of input signals, measured with the 1dB compression point. The noise figure is also a major consideration for RF-devices, but in the case of the mixer, its importance is not as prevalent as it is for the LNA that precedes it, since the noise of the mixer is attenuated by the gain of the previous stages. This master’s thesis work introduces the basic theory around downconversion mixers, followed by the design of a mixer from schematic level circuit design all the way to the physical layout. The physical design is done using 22nm FDSOI technology, provided by GlobalFoundries. The design is made for a direct conversion receiver using Gilbert cell topology, meaning image rejection is reasonable and depends only on the received signal itself, and good noise and feedthrough performance should be expected in simulations. The mixer is to downconvert a 151 GHz signal down to 0–1 GHz, using an LO signal between 150–151 GHz. Two iterations of the mixer are shown in the end results, the first one being based on the schematic design, and the second one with adjustments made for better performance. While driving a high impedance 500 Ohm load, the second iteration was able to reach a conversion gain of -10.0 dB with a 1dB compression point of 6.4 dBm while dissipating 4.7 mW of power. DSB noise figure was simulated to be 17.3 dB and the LO leakage to the IF output at -27.7 dBm.Alaspäin taajuusmuuntavan sekoittimen suunnittelu D-kaistalle käyttäen CMOS-SOI teknologiaa. Tiivistelmä. Nykyinen tutkimuksen keskittyminen millimetriaalto ja THz taajuusalueille ei tule kenellekään yllätyksenä. Suurempien datanopeuksien ja vapaiden taajuuskaistojen potentiaali ovat vain joitain monista hyvistä käytännön syistä, miksi tutkimusta näiden taajuuksien ympärillä priorisoidaan. Monia käytännöllisiä vastaanotinrakenteita on esitetty näille taajuusalueille ja niillä on kaikilla yksi yhteinen tekijä: tajuusmuunnin alemmille taajuuksille. Taajuusmuunnin eli sekoitin on olennainen osa vastaanotinrakenteita, muuntaen korkeamman radiotaajuuden (RF) matalammalle välitaajuudelle (IF) käyttäen taajuuksien sekoittamista paikallisoskillaattorilla (LO). Mikserin ulostulosignaali on signaalinprosessoinnin näkökulmasta paljon käytännöllisempi. Alaspäin taajuusmuuntavan mikserin tulee pystyä vahvistamaan laajaa skaalaa erivahvuisia signaaleja, minkä ylärajaa mittaamme 1 dB kompressiopisteellä. Radiolaitteistossa kohinaluku tulee yleensä myös ottaa huomioon, mutta johtuen mikserin sijainnista vastaanotinketjussa, kohinaluku vaimenee suhteessa sitä edeltävien vahvistuksien verran, eikä siksi ole niin kriittinen. Tämä diplomityö esittelee lukijalle ensiksi alaspäin muuntavan taajuussekoittimen perusteorian, toisena sen teoreettisen piirikaavion suunnittelun sekä sen simuloinnin tuloksia, ja viimeisenä fyysisen layoutin suunnittelun sekä sen simuloinnin tulokset. Fyysisen layoutin suunnittelu ja simulointi tehdään käyttäen GlobalFoundries 22nm FDSOI teknologiaa. Suunnittelu tehdään suoramuunnosvastaanottimelle käyttäen Gilbertin solu topologiaa, eliminoiden peilitaajuuksista aiheutuvat ongelmat, sekä vähentäen kohinan sekä ei-haluttujen signaalien läpivuotojen vaikutusta. Sekoittimen tulee muuntaa 151 GHz signaali n. 0–1 GHz kantataajuudelle käyttäen LO-signaalia taajuusvälillä 150–151 GHz. Lopullisissa tuloksissa vertaillaan kahta eri iteraatiota. Ensimmäisenä versiota, joka luotiin alun perin teoriapohjaisen piirisuunnittelun pohjalta, sekä toista versiota, missä useilla parannuksilla mikserin suorituskykyä saatiin parannettua. Korkeaimpedanssista 500 Ohmin kuormaa ajaessa mikseri ylsi -10.0 dB vahvistukseen, 1 dB kompressiopiste oli 6.4 dB kuluttaen 4.7 mW virtaa käytössä. Kohinaluvuksi simuloitiin 17.3 dB, sekä LO signaalin vuodosta IF lähtöön oli -27.7 dBm