On the Throughput of Channels that Wear Out

This work investigates the fundamental limits of communication over a noisy discrete memoryless channel that wears out, in the sense of signal-dependent catastrophic failure. In particular, we consider a channel that starts as a memoryless binary-input channel and when the number of transmitted ones causes a sufficient amount of damage, the channel ceases to convey signals. Constant composition codes are adopted to obtain an achievability bound and the left-concave right-convex inequality is then refined to obtain a converse bound on the log-volume throughput for channels that wear out. Since infinite blocklength codes will always wear out the channel for any finite threshold of failure and therefore cannot convey information at positive rates, we analyze the performance of finite blocklength codes to determine the maximum expected transmission volume at a given level of average error probability. We show that this maximization problem has a recursive form and can be solved by dynamic programming. Numerical results demonstrate that a sequence of block codes is preferred to a single block code for streaming sources.Comment: 23 pages, 1 table, 11 figures, submitted to IEEE Transactions on Communication

Online Nbti Wear-out Estimation

CMOS feature size scaling has been a source of dramatic performance gains, but it has come at a cost of on-chip wear-out. Negative Bias Temperature Instability (NBTI) is one of the main on-chip wear-out problems which questions the reliability of a chip. To check the accuracy of Reaction-Diffusion (RD) model, this work first proposes to compare the NBTI wear-out data from the RD wear-out model and the reliability simulator - Ultrasim RelXpert, by monitoring the activity of the register file on a Leon3 processor. The simulator wear-out data obtained is considered to be the baseline data and is used to tune the RD model using a novel technique time slicing. It turns out that the tuned RD model NBTI degradation is on an average 80% accurate with respect to RelXpert simulator and its calculation is approximately 8 times faster than the simulator. We come up with a waveform compression technique, for the activity waveforms from the Leon3 register file, which consumes 131KB compared to 256MB required without compression, and also provides 91% accuracy in NBTI degradation, compared to the same obtained without compression. We also propose a NBTI ΔVth estimation/prediction technique to reduce the time consumption of the tuned RD model threshold voltage calculation by an order of with one day degradation being 93% within the same of the tuned RD model. This work further proposes to a novel NBTI Degradation Predictor (NDP), to predict the future NBTI degradation, in a DE2 FPGA for WCET benchmarks. Also we measure the ΔVth variation across the 4 corners of the DE2 FPGA running a single Leon3, which varies from 0.08% to 0.11% of the base Vth

A Cache Management Strategy to Replace Wear Leveling Techniques for Embedded Flash Memory

Prices of NAND flash memories are falling drastically due to market growth and fabrication process mastering while research efforts from a technological point of view in terms of endurance and density are very active. NAND flash memories are becoming the most important storage media in mobile computing and tend to be less confined to this area. The major constraint of such a technology is the limited number of possible erase operations per block which tend to quickly provoke memory wear out. To cope with this issue, state-of-the-art solutions implement wear leveling policies to level the wear out of the memory and so increase its lifetime. These policies are integrated into the Flash Translation Layer (FTL) and greatly contribute in decreasing the write performance. In this paper, we propose to reduce the flash memory wear out problem and improve its performance by absorbing the erase operations throughout a dual cache system replacing FTL wear leveling and garbage collection services. We justify this idea by proposing a first performance evaluation of an exclusively cache based system for embedded flash memories. Unlike wear leveling schemes, the proposed cache solution reduces the total number of erase operations reported on the media by absorbing them in the cache for workloads expressing a minimal global sequential rate.Comment: Ce papier a obtenu le "Best Paper Award" dans le "Computer System track" nombre de page: 8; International Symposium on Performance Evaluation of Computer & Telecommunication Systems, La Haye : Netherlands (2011

Self-regenerating desiccant system

Compact system uses inherent diurnal cyclic airflow in system and energy of sun as drying heat. System requires no power for operation, has no moving parts to wear out, requires no blowers or manifolds, and is relatively inexpensive to produce

Wear-Out Sensitivity Analysis Project Abstract

During the course of the Summer 2015 internship session, I worked in the Reliability and Maintainability group of the ISS Safety and Mission Assurance department. My project was a statistical analysis of how sensitive ORU's (Orbital Replacement Units) are to a reliability parameter called the wear-out characteristic. The intended goal of this was to determine a worst case scenario of how many spares would be needed if multiple systems started exhibiting wear-out characteristics simultaneously. The goal was also to determine which parts would be most likely to do so. In order to do this, my duties were to take historical data of operational times and failure times of these ORU's and use them to build predictive models of failure using probability distribution functions, mainly the Weibull distribution. Then, I ran Monte Carlo Simulations to see how an entire population of these components would perform. From here, my final duty was to vary the wear-out characteristic from the intrinsic value, to extremely high wear-out values and determine how much the probability of sufficiency of the population would shift. This was done for around 30 different ORU populations on board the ISS

Samuel D. Gross, M.D. (1805-1884): an innovator, even in death.

Dr. Samuel Gross\u27 contributions to the field of surgery are well known and range from numerous clinical advances to pioneering scholarship and professional activities. Dr. Gross was ceaselessly ambitious and even remarked in his autobiography that his ‘‘conviction has always been that is far better for a man to wear out than to rust out.’’1 It is through this frame of motivation that Dr. Gross lived his life

Electric propulsion - characteristics, applications, and status

A comparative review of the principles of ion thruster and chemical rocket operations is presented. The 30cm mercury ion thruster development and the specifications imposed on it by the Solar Electric propulsion System program are discussed. The 30cm thruster operating range, efficiency, wear out lifetime, and interface requirements are described

Inverter design for future electrified aircraft propulsion systems under consideration of wear-out failure and random failure

To reduce the wear-out effect and minimize the Single Event Burnout effect of the power semiconductor, several hardware design rules for inverters in electric aircraft propulsion systems are posed and implemented in this work. These strategies include scalable chip area and derated DC-link voltage. It is observed in a short-range reference aircraft case study that these rules could result in a conflict of objectives: reducing the risk of wear-out failure while simultaneously minimizing the risk of random failure. Therefore, it is recommended to consider random failures, wear-out failures, and their mutual impacts in a comprehensive analysis of system reliability. A reliability-oriented design rule is proposed in this work

On the design of a reliability circuit simulator

This paper describes the outcome of a study into the feasibility of a reliability circuit simulator for ICs in general and the critical parameters involved in particular. The necessary conditions are formulated that have to be fulfilled before any construction of the reliability simulator is meaningful or can be done at all. It has been found that failure mechanisms in the wear-out regime meet these conditions. Next, a general approach is given to make a simulator. This approach is actually derived from circuit simulator activities on hot carrier degradation and electromigration, respectively. Finally, the different groups of parameters are defined

Maintenance Scheduling in Power Electronic Converters Considering Wear-out Failures

Power electronic converters are one of failure sources in energy systems, and hence drivers of downtime costs in power systems. Different approaches can be employed for converter reliability enhancement including design/control for reliability methods, condition monitoring and fault diagnosis, and maintenance strategies. This paper proposes optimal preventive maintenance strategies based on wear-out failure model of converter components. The proposed approaches employ two different performance measures at converter-level and system-level. The converter-level measures take into account planned and unplanned maintenance times or costs in a single unit or small-scale system. Moreover, the system-level measure considers not only maintenance times, but also energy losses and additional maintenance costs induced by aging of the converter components. The outcome is optimal replacement time of converter and its components, which depends on the employed performance measure. Optimal replacement scheduling is of importance for risk management and decision-making during planning of modern power electronic based power systems. The applicability of the proposed approaches is illustrated by numerical analysis in a photovoltaic system