5 research outputs found
Preamplifier for biological signals processing
PrĂĄce se zabĂœvĂĄ problematikou nĂĄvrhu a optimalizace zesilovaÄĆŻ v technologii CMOS s nĂzkĂœm napĂĄjecĂm napÄtĂm a nĂzkou spotĆebou. HlavnĂm zamÄĆenĂm prĂĄce je navrhnout zesilovaÄ pro zesĂlenĂ biologickĂœch signĂĄlu. V prvnĂ ÄĂĄsti prĂĄce je struÄnĂœ Ășvod do teorie biologickĂœch signĂĄlĆŻ. DĂĄle prĂĄce obsahuje struÄnĂœ popis metod zpracovĂĄnĂ biologickĂœch signĂĄlĆŻ a jejich vlastnosti. DĆŻleĆŸitou ÄĂĄstĂ prĂĄce je popis metod pro snĂĆŸenĂ napĂĄjecĂ napÄtĂ zesilovaÄe. PraktickĂĄ ÄĂĄst tĂ©to prĂĄce je zamÄĆena na nĂĄvrh zesilovaÄe s nĂzkĂœm napĂĄjecĂm napÄtĂm a s nĂzkou spotĆebou. VĆĄechny aktivnĂ prvky a pĆĂklady aplikacĂ byly ovÄĆeny pomocĂ PSpice simulacĂ s vyuĆŸitĂm parametrĆŻ technologie 0,18 ”m TSMC CMOS. Pro ilustraci chovĂĄnĂ struktur je v diplomovĂ© prĂĄci zahrnuty simulaÄnĂ vĂœsledky.The work deals with the design and optimization of amplifiers in CMOS technology with low supply voltage and low power consumption. The main aim is to design an amplifier to amplify the biological signal. The first part is a brief introduction to the theory of biological signals. The work also contains a brief description of the biological signal processing methods and their properties. The important part is the description of the methods to reduce the supply voltage of the amplifier. The practical part of this thesis focuses on the design amplifiers with low supply voltage and low power consumption. All active elements and application examples have been verified by PSpice simulator using the 0.18 ”m TSMC CMOS parameters. Simulated plots are included in this thesis to illustrate behavior of structures.
Design of low-voltage operational amplifier
Tato prĂĄce se zabĂœvĂĄ nĂĄvrhem operaÄnĂho zesilovaÄe s extrĂ©mnÄ nĂzkĂœm napĂĄjecĂm napÄtĂm a nĂzkou spotĆebou. V teoretickĂ© ÄĂĄsti je pĆedstavena teorie zabĂœvajĂcĂ se strukturou a nĂĄvrhem operaÄnĂho zesilovaÄe. V nĂĄsledujĂcĂ ÄĂĄsti jsou popsĂĄny nĂĄvrhovĂ© metody vhodnĂ© k realizaci nĂzkonapÄĆ„ovĂœch obvodĆŻ. V dalĆĄĂ ÄĂĄsti byly navrhnuty dva operaÄnĂ zesilovaÄe s pouĆŸitĂm nĂzkonapÄĆ„ovĂœch metod. Vlastnosti tÄchto operaÄnĂch zesilovaÄĆŻ byly potĂ© ovÄĆeny simulacemi.This work deals with the design of operational amplifier with extremely low supply voltage and low power consumption. In the theoretical part is presented theory dealing with the structure and design of operational amplifier. In the following part are desribed design methods suitable for realization of low-voltage circuits. In the next part were designed two operational amplifiers using low-voltage design methods. Properties of these operational amplifiers were then tested by simulations.
Utilizing Unconventional CMOS Techniques for Low Voltage Low Power Analog Circuits Design for Biomedical Applications
Tato disertaÄnĂ prĂĄce se zabĂœvĂĄ navrĆŸenĂm nĂzkonapÄĆ„ovĂœch, nĂzkopĆĂkonovĂœch analogovĂœch obvodĆŻ, kterĂ© pouĆŸĂvajĂ nekonvenÄnĂ techniky CMOS. LĂ©kaĆskĂĄ zaĆĂzenĂ na bateriovĂ© napĂĄjenĂ, jako systĂ©my pro dlouhodobĂœ fyziologickĂœ monitoring, pĆenosnĂ© systĂ©my, implantovatelnĂ© systĂ©my a systĂ©my vhodnĂ© na noĆĄenĂ, musĂ bĂœt male a lehkĂ©. KromÄ toho je nutnĂ©, aby byly tyto systĂ©my vybaveny bateriĂ s dlouhou ĆŸivotnostĂ. Z tohoto dĆŻvodu pĆevlĂĄdajĂ v biomedicĂnskĂœch aplikacĂch tohoto typu nĂzkopĆĂkonovĂ© integrovanĂ© obvody. NekonvenÄnĂ techniky jako napĆ. vyuĆŸitĂ transistorĆŻ s ĆĂzenĂœm substrĂĄtem (Bulk-Driven âBDâ), s plovoucĂm hradlem (Floating-Gate âFGâ), s kvazi plovoucĂm hradlem (Quasi-Floating-Gate âQFGâ), s ĆĂzenĂœm substrĂĄtem s plovoucĂm hradlem (Bulk-Driven Floating-Gate âBD-FGâ) a s ĆĂzenĂœm substrĂĄtem s kvazi plovoucĂm hradlem (Bulk-Driven Quasi-Floating-Gate âBD-QFGâ), se v nedĂĄvnĂ© dobÄ ukĂĄzaly jako efektivnĂ prostĆedek ke zjednoduĆĄenĂ obvodovĂ©ho zapojenĂ a ke snĂĆŸenĂ velikosti napĂĄjecĂho napÄtĂ smÄrem k prahovĂ©mu napÄtĂ u tranzistorĆŻ MOS (MOST). V prĂĄci jsou podrobnÄ pĆedstaveny nejdĆŻleĆŸitÄjĆĄĂ charakteristiky nekonvenÄnĂch technik CMOS. Tyto techniky byly pouĆŸity pro vytvoĆenĂ nĂzko napÄĆ„ovĂœch a nĂzko vĂœkonovĂœch CMOS struktur u nÄkterĂœch aktivnĂch prvkĆŻ, napĆ. Operational Transconductance Amplifier (OTA) zaloĆŸenĂ© na BD, FG, QFG, a BD-QFG techniky; Tunable Transconductor zaloĆŸenĂœ na BD MOST; Current Conveyor Transconductance Amplifier (CCTA) zaloĆŸenĂœ na BD-QFG MOST; Z Copy-Current Controlled-Current Differencing Buffered Amplifier (ZC-CC-CDBA) zaloĆŸenĂœ na BD MOST; Winner Take All (WTA) and Loser Take All (LTA) zaloĆŸenĂœ na BD MOST; Fully Balanced Four-Terminal Floating Nullor (FBFTFN) zaloĆŸenĂœ na BD-QFG technice. Za ĂșÄelem ovÄĆenĂ funkÄnosti vĂœĆĄe zmĂnÄnĂœch struktur, byly tyto struktury pouĆŸity v nÄkolika aplikacĂch. VĂœkon navrĆŸenĂœch aktivnĂch prvkĆŻ a pĆĂkladech aplikacĂ je ovÄĆovĂĄn prostĆednictvĂm simulaÄnĂch programĆŻ PSpice Äi Cadence za pouĆŸitĂ technologie 0.18 m CMOS.This doctoral thesis deals with designing ultra-low-voltage (LV) low-power (LP) analog circuits utilizing the unconventional CMOS techniques. Battery powered medical devices such as; long term physiological monitoring, portable, implantable, and wearable systems need to be small and lightweight. Besides, long life battery is essential need for these devices. Thus, low-power integrated circuits are always paramount in such biomedical applications. Recently, unconventional CMOS techniques i.e. Bulk-Driven (BD), Floating-Gate (FG), Quasi-Floating-Gate (QFG), Bulk-Driven Floating-Gate (BD-FG) and Bulk-Driven Quasi-Floating-Gate (BD-QFG) MOS transistors (MOSTs) have revealed as effective devices to reduce the circuit complexity and push the voltage supply of the circuit towards threshold voltage of the MOST. In this work, the most important features of the unconventional CMOS techniques are discussed in details. These techniques have been utilized to perform ultra-LV LP CMOS structures of several active elements i.e. Operational Transconductance Amplifier (OTA) based on BD, FG, QFG, and BD-QFG techniques; Tunable Transconductor based on BD MOST; Current Conveyor Transconductance Amplifier (CCTA) based on BD-QFG MOST; Z Copy-Current Controlled-Current Differencing Buffered Amplifier (ZC-CC-CDBA) based on BD MOST; Winner Take All (WTA) and Loser Take All (LTA) based on BD MOST; Fully Balanced Four-Terminal Floating Nullor (FBFTFN) based on BD-QFG technique. Moreover, to verify the workability of the proposed structures, they were employed in several applications. The performance of the proposed active elements and their applications were investigated through PSpice or Cadence simulation program using 0.18 m CMOS technology.
FPGA Application - Data Collector for TI MicroReaders Group
Import 04/07/2011CĂlem tĂ©to diplomovĂ© prĂĄce je realizace mikroprocesorovĂ©ho systĂ©mu se ÄtyĆmi asynchronnĂmi sĂ©riovĂœmi rozhranĂmi na bĂĄzi hradlovĂ©ho pole, kterĂœ bude zprostĆedkovĂĄvat sbÄr dat ze ÄteÄek RFID a jejich pĆedĂĄvĂĄnĂ pomocĂ sĂ©riovĂ©ho rozhranĂ. Data budou pĆebĂrĂĄna ve formĂĄtu, jakĂœ produkuje ÄteÄka Micro-reader RI-STU-MRD1, nĂĄslednÄ zpracovĂĄna a v novĂ©m formĂĄtu posĂlĂĄna pro nadĆazenou aplikaci.
PrvnĂ ÄĂĄst prĂĄce je zamÄĆena na pouĆŸitĂ© technologie a jejich vlastnosti. Jsou zde popsĂĄny vĆĄechny dĆŻleĆŸitĂ© technologie nezbytnĂ© pro vytvoĆenĂ diplomovĂ© prĂĄce. DruhĂĄ ÄĂĄst je zamÄĆena na pouĆŸitĂœ hardware a takĂ© hardware, kterĂœ je nutnĂœ navrhnout pomocĂ FPGA SmartFusion. Ve tĆetĂ Äasti je popsĂĄn software nezbytnĂœ k funkÄnosti mikroprocesorovĂ©ho systĂ©mu. PĆedposlednĂ kapitola pojednĂĄvĂĄ o testovĂĄnĂ aplikace a koneÄnÄ poslednĂ kapitola podĂĄvĂĄ vĂœsledek a pĆĂnos diplomovĂ© prĂĄce.The aim of this thesis is the realization of a microprocessor system with four asynchronous serial interfaces based on gate array, which will arrange the collection of data from RFID readers and their transmission over the serial interface. Data will be taken over in a format that produces the reader-Micro Reader RI-STU-MRD1, then they will be processed and sent to a new format for a superior application. The first part focuses on the applied technology and its properties. All the important technologies which are needed for the thesis are desribed there. The second part focuses on the hardware used and also the hardware that is required to design FPGA SmartFusion. The third section describes a software that is neccesarry for the functioning of the microprocessor system. The penultimate chapter deals with testing of application and finally the last chapter provides a result and benefit of the thesis.460 - Katedra informatikyvĂœborn
Low Voltage Low Power Analogue Circuits Design
DisertaÄnĂ prĂĄce je zamÄĆena na vĂœzkum nejbÄĆŸnÄjĆĄĂch metod, kterĂ© se vyuĆŸĂvajĂ pĆi nĂĄvrhu analogovĂœch obvodĆŻ s vyuĆŸitĂ nĂzkonapÄĆ„ovĂœch (LV) a nĂzkopĆĂkonovĂœch (LP) struktur. Tyto LV LP obvody mohou bĂœt vytvoĆeny dĂky vyspÄlĂœm technologiĂm nebo takĂ© vyuĆŸitĂm pokroÄilĂœch technik nĂĄvrhu. DisertaÄnĂ prĂĄce se zabĂœvĂĄ prĂĄvÄ pokroÄilĂœmi technikami nĂĄvrhu, pĆedevĆĄĂm pak nekonvenÄnĂmi. Mezi tyto techniky patĆĂ vyuĆŸitĂ prvkĆŻ s ĆĂzenĂœm substrĂĄtem (bulk-driven - BD), s plovoucĂm hradlem (floating-gate - FG), s kvazi plovoucĂm hradlem (quasi-floating-gate - QFG), s ĆĂzenĂœm substrĂĄtem s plovoucĂm hradlem (bulk-driven floating-gate - BD-FG) a s ĆĂzenĂœm substrĂĄtem s kvazi plovoucĂm hradlem (quasi-floating-gate - BD-QFG). PrĂĄce je takĂ© orientovĂĄna na moĆŸnĂ© zpĆŻsoby implementace znĂĄmĂœch a modernĂch aktivnĂch prvkĆŻ pracujĂcĂch v napÄĆ„ovĂ©m, proudovĂ©m nebo mix-mĂłdu. Mezi tyto prvky lze zaÄlenit zesilovaÄe typu OTA (operational transconductance amplifier), CCII (second generation current conveyor), FB-CCII (fully-differential second generation current conveyor), FB-DDA (fully-balanced differential difference amplifier), VDTA (voltage differencing transconductance amplifier), CC-CDBA (current-controlled current differencing buffered amplifier) a CFOA (current feedback operational amplifier). Za ĂșÄelem potvrzenĂ funkÄnosti a chovĂĄnĂ vĂœĆĄe zmĂnÄnĂœch struktur a prvkĆŻ byly vytvoĆeny pĆĂklady aplikacĂ, kterĂ© simulujĂ usmÄrĆovacĂ a induktanÄnĂ vlastnosti diody, dĂĄle pak filtry dolnĂ propusti, pĂĄsmovĂ© propusti a takĂ© univerzĂĄlnĂ filtry. VĆĄechny aktivnĂ prvky a pĆĂklady aplikacĂ byly ovÄĆeny pomocĂ PSpice simulacĂ s vyuĆŸitĂm parametrĆŻ technologie 0,18 m TSMC CMOS. Pro ilustraci pĆesnĂ©ho a ĂșÄinnĂ©ho chovĂĄnĂ struktur je v disertaÄnĂ prĂĄci zahrnuto velkĂ© mnoĆŸstvĂ simulaÄnĂch vĂœsledkĆŻ.The dissertation thesis is aiming at examining the most common methods adopted by analog circuits' designers in order to achieve low voltage (LV) low power (LP) configurations. The capability of LV LP operation could be achieved either by developed technologies or by design techniques. The thesis is concentrating upon design techniques, especially the nonâconventional ones which are bulkâdriven (BD), floatingâgate (FG), quasiâfloatingâgate (QFG), bulkâdriven floatingâgate (BDâFG) and bulkâdriven quasiâfloatingâgate (BDâQFG) techniques. The thesis also looks at ways of implementing structures of wellâknown and modern active elements operating in voltageâ, currentâ, and mixedâmode such as operational transconductance amplifier (OTA), second generation current conveyor (CCII), fullyâdifferential second generation current conveyor (FBâCCII), fullyâbalanced differential difference amplifier (FBâDDA), voltage differencing transconductance amplifier (VDTA), currentâcontrolled current differencing buffered amplifier (CCâCDBA) and current feedback operational amplifier (CFOA). In order to confirm the functionality and behavior of these configurations and elements, they have been utilized in application examples such as diodeâless rectifier and inductance simulations, as well as lowâpass, bandâpass and universal filters. All active elements and application examples have been verified by PSpice simulator using the 0.18 m TSMC CMOS parameters. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of structures.