Suppression of Edge Recombination in InAs/InGaAs DWELL Solar Cells

The InAs/InGaAs DWELL solar cell grown by MBE is a standard pin diode structure with six layers of InAs QDs embedded in InGaAs quantum wells placed within a 200-nm intrinsic GaAs region. The GaAs control wafer consists of the same pin configuration but without the DWELL structure. The typical DWELL solar cell exhibits higher short current density while maintaining nearly the same open-circuit voltage for different scales, and the advantage of higher short current density is more obvious in the smaller cells. In contrast, the smaller size cells, which have a higher perimeter to area ratio, make edge recombination current dominant in the GaAs control cells, and thus their open circuit voltage and efficiency severely degrade. The open-circuit voltage and efficiency under AM1.5G of the GaAs control cell decrease from 0.914V and 8.85% to 0.834V and 7.41%, respectively, as the size shrinks from 5*5mm2 to 2*2mm2, compared to the increase from 0.665V and 7.04% to 0.675V and 8.17%, respectively, in the DWELL solar cells

Comparison of 'shallow' and 'deep' junction architectures for MBE-grown InAs/GaAs quantum dot solar cells

We report on the fabrication of InAs/GaAs quantum dot solar cells with high open circuit voltage by molecular beam epitaxy. `Shallow' and `deep' junction architectures were compared. The highest open circuit voltage of 0.94 V was obtained for the `shallow' junction configuration. The open circuit voltage of InAs quantum dot solar cells decreased only by ~40 mV compared to GaAs reference cells for both junction architectures indicating high quality quantum dots. The open circuit voltage of InAs/GaAs quantum dot solar cells was also found to be dependent on the size of quantum dots

Further study of inversion layer MOS solar cells

A group of inversion layer MOS solar cells has been fabricated. The highest value of open-circuit voltage obtained for the cells is 0.568V. One of the cells has produced a short-circuit current of 79.6 mA and an open-circuit voltage of 0.54V. It is estimated that the actual area AMO efficiency of this cell is 6.6 percent with an assumed value of 0.75 for its fill factor. Efforts made for fabricating an IL/MOS cell with reasonable efficiencies are reported. Future work for 4 sq cm IL cells and 25 sq cm IL cells is discussed

Thin n-i-p radiation-resistant solar cell feasibility study

Silicon solar cells were fabricated to verify the predictions that: (1) thin n(+)pp(+) cells can provide high values of open circuit voltage even when high resistivity base material ( 1000 omega-cm) is used; (2) cells with good p(+) back contacts will display an increase in open circuit voltage with decreasing cell thickness; and (3) high quality, thin, high resistivity, solar cells can be made using processing compatible with conventional practice. Analysis of I-V and spectral response measurements of these cells confirmed theoretical predictions and thereby pointed to voltages beyond the near 600 mV obtained in this study

Simulation Study on the Open-Circuit Voltage of Amorphous Silicon p-i-n Solar Cells Using AMPS-1D

AMPS-1D (Analysis of Microelectronic and Photonic Structure) simulation program was used to simulate Amorphous Silicon p-i-n Solar Cell. The simulated result of illuminated current density-voltage characteristics was in a good agreement with experimental values. The dependence of the open-circuit voltage on the characteristics of the a-Si:H intrinsic layer was investigated. The simulation result shows that the open-circuit voltage does not depend on the thickness of the intrinsic layer. The open-circuit voltage decreases when the front contact barrier height is small or the energy gap of the intrinsic layer is small. The open-circuit voltage increases when the distribution of the tail states is sharp or the capture cross sections of these states are small. When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/3432

Development of a high efficiency thin silicon solar cell

Significant improvements in open-circuit voltage and conversion efficiency, even on relatively high bulk resistivity silicon, were achieved by using a screen-printed aluminum paste back surface field. A 4 sq cm 50 micron m thick cell was fabricated from textured 10 omega-cm silicon which had an open-circuit voltage of 595 mV and AMO conversion efficiency at 25 C of 14.3%. The best 4 sq cm 50 micron thick cell (2 omega-cm silicon) produced had an open-circuit voltage of 607 mV and an AMO conversion efficiency of 15%. Processing modifications are described which resulted in better front contact integrity and reduced breakage. These modifications were utilized in the thin cell pilot line to fabricate 4 sq cm cells with an average AMO conversion efficiency at 25 C of better than 12.5% and with lot yields as great as 51% of starts; a production rate of 10,000 cells per month was demonstrated. A pilot line was operated which produced large area (25 cm) ultra-thin cells with an average AMO conversion efficiency at 25 deg of better than 11.5% and a lot yield as high as 17%