6,156 research outputs found

    A low-voltage CMOS multiplier for RF applications

    Get PDF
    This work is part of a project funded under the Fourth Italian-Maltese Financial Protocol.A low-voltage analog multiplier operating at 1.2 V is presented. The multiplier core consists of four MOS transistors operating in the saturation region. The circuit exploits the quadratic relation between current and voltage of the MOS transistor in saturation. The circuit was designed using standard 0.6 /spl mu/m CMOS technology. Simulation results indicate an IP3 of 4.9 dBm and a spur free dynamic range of 45 dB.peer-reviewe

    A Compact Apparatus for Muon Lifetime Measurement and Time Dilation Demonstration in the Undergraduate Laboratory

    Full text link
    We describe a compact apparatus that automatically measures the charge averaged lifetime of atmospheric muons in plastic scintillator using low-cost, low-power electronics and that measures the stopping rate of atmospheric muons as a function of altitude to demonstrate relativistic time dilation. The apparatus is designed for the advanced undergraduate physics laboratory and is suitable for field measurements.Comment: 5 pages, 2 figure

    Vertical III-V Nanowire Transistors for Low-Power Electronics

    Get PDF
    Power dissipation has been the major challenge in the downscaling of transistor technology. Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) have struggled to keep a low power consumption while still maintaining a high performance due to the low carrier mobilities of Si but also due to their inherent minimum inverse subthreshold slope (S ≥ 60 mV/dec) which is limited by thermionic emission. This thesis work studied the capabilities and limitations of III-V based vertical nanowire n-type Tunneling Field-Effect Transistor (TFET) and p-type MOSFET (PMOS). InAs/InGaAsSb/GaSb heterojunction was employed in the whole study. The main focus was to understand the influence of the device fabrication processes and the structural factors of the nanowires such as band alignment, composition and doping on the electrical performance of the TFET. Optimizations of the device processes including spacer technology improvement, Equivalent Oxide Thickness (EOT) downscaling, and gate underlap/overlap were explored utilizing structural characterizations. Systematic fine tuning of the band alignment of the tunnel junction resultedin achieving the best performing sub-40 mV/dec TFETs with S = 32 mV/decand ION = 4μA/μm for IOFF = 1 nA/μm at VDS = 0.3 V. The suitability of employing TFET for electronic applications at cryogenic temperatures has been explored utilizing experimental device data. The impact of the choice of heterostructure and dopant incorporation were investigated to identify the optimum operating temperature and voltage in different temperature regimes. A novel gate last process self-aligning the gate and drain contacts to the intrinsic and doped segments, respectively was developed for vertical InGaAsSb-GaAsSb core-shell nanowire transistors leading to the first sub-100 mV/dec PMOS with S = 75 mV/dec, significant ION/ IOFF = 104 and IMIN < 1 nA/μm at VDS = -0.5 V

    Quantum Transport Simulation of III-V TFETs with Reduced-Order K.P Method

    Full text link
    III-V tunneling field-effect transistors (TFETs) offer great potentials in future low-power electronics application due to their steep subthreshold slope and large "on" current. Their 3D quantum transport study using non-equilibrium Green's function method is computationally very intensive, in particular when combined with multiband approaches such as the eight-band K.P method. To reduce the numerical cost, an efficient reduced-order method is developed in this article and applied to study homojunction InAs and heterojunction GaSb-InAs nanowire TFETs. Device performances are obtained for various channel widths, channel lengths, crystal orientations, doping densities, source pocket lengths, and strain conditions

    Ultra-wide band energy harvesting for ultra-low power electronics applications

    Get PDF
    In this work, the feasibility of energy harvesting in the useful UWB band (i.e., 3.1-10.6 GHz) is analytically investigated. A typical UWB communications/EH chain in this band is modeled and analyzed, considering the spectral constraints imposed by the federal communications commission (FCC) to UWB signaling. Based on the developed model, accurate analytical expressions are derived for the average received powers of two common types of impulse radio UWB (IR-UWB) signaling waveforms. Numerical simulations on the system-level show excellent agreement with the obtained analytical expressions. Moreover, the DC power levels expected from spectrally constrained IR-UWB waveforms are extremely low (less than 0.3 microwatt) and, accordingly, provide useful guidelines for the design and development of ULP electronics applications in the sub-microwatt range

    Synthesis and Optimization of Reversible Circuits - A Survey

    Full text link
    Reversible logic circuits have been historically motivated by theoretical research in low-power electronics as well as practical improvement of bit-manipulation transforms in cryptography and computer graphics. Recently, reversible circuits have attracted interest as components of quantum algorithms, as well as in photonic and nano-computing technologies where some switching devices offer no signal gain. Research in generating reversible logic distinguishes between circuit synthesis, post-synthesis optimization, and technology mapping. In this survey, we review algorithmic paradigms --- search-based, cycle-based, transformation-based, and BDD-based --- as well as specific algorithms for reversible synthesis, both exact and heuristic. We conclude the survey by outlining key open challenges in synthesis of reversible and quantum logic, as well as most common misconceptions.Comment: 34 pages, 15 figures, 2 table

    The power of glove: Soft microbial fuel cell for low-power electronics

    Get PDF
    A novel, soft microbial fuel cell (MFC) has been constructed using the finger-piece of a standard laboratory natural rubber latex glove. The natural rubber serves as structural and proton exchange material whilst untreated carbon veil is used for the anode. A soft, conductive, synthetic latex cathode is developed that coats the outside of the glove. This inexpensive, lightweight reactor can without any external power supply, start up and energise a power management system (PMS), which steps-up the MFC output (0.06-0.17 V) to practical levels for operating electronic devices (>3 V). The MFC is able to operate for up to 4 days on just 2 mL of feedstock (synthetic tryptone yeast extract) without any cathode hydration. The MFC responds immediately to changes in fuel-type when the introduction of urine accelerates the cycling times (35 vs. 50 min for charge/discharge) of the MFC and PMS. Following starvation periods of up to 60 h at 0 mV the MFC is able to cold start the PMS simply with the addition of 2 mL fresh feedstock. These findings demonstrate that cheap MFCs can be developed as sole power sources and in conjunction with advancements in ultra-low power electronics, can practically operate small electrical devices.© 2013 Elsevier B.V. All rights reserved
    • …
    corecore