On finite complete rewriting systems and large subsemigroups

Let $S$ be a semigroup and $T$ be a subsemigroup of finite index in $S$ (that is, the set $S\setminus T$ is finite). The subsemigroup $T$ is also called a large subsemigroup of $S$. It is well known that if $T$ has a finite complete rewriting system then so does $S$. In this paper, we will prove the converse, that is, if $S$ has a finite complete rewriting system then so does $T$. Our proof is purely combinatorial and also constructive.Comment: We have made major changes to the paper and simplified most of the proof

Double-Layer No-Flow Underfill Process for Flip-Chip Applications

©2003 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or distribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.No-flow underfill technology shows potential advances over the conventional underfill technology toward a low-cost flop-chip underfill process. However, due to the filler entrapment in between solder bumps and contact pads on board, no-flow underfills are mostly unfilled or filled with very low filler loading. The high coefficient of thermal expansion (CTE) of the polymer material has significantly lowered the reliability of flip chip assembly and has limited its application to large chip assemblies. This paper presents a double-layer no-flow underfill process approach to incorporate silica filler into a no-flow underfill. Two layers of underfills are applied on to the substrate before chip placement. The bottom underfill layer facing the substrate is fluxed and unfilled; the upper layer facing the chip is filled with silica fillers. The total filler loading of the mixture is estimated to be around 55 wt%. The material properties of each layer of underfills, the underfill mixture, and a control unfilled underfill are characterized using differential scanning calorimeter (DCS), thermo-mechanical analyzer (TMA), dynamic mechanical analyzer (DMA), and a stress rheometer. FB250 daisy-chained test chips are assembled on FR-4 boards using the novel approach. A 100% assembly yield of solder Interconnect is achieved with the double-layer no-flow underfill while in the single-layer no-flow underfill process, no solder joint yield is observed. Scanning electronic microscope (SEM) and optical microscope are used to investigate the cross-section of both assemblies. A US provisional patent has been filed for this invention

A unified model of the electrical power network

Traditionally, the different infrastructure layers, technologies and management activities associated with the design, control and protection operation of the Electrical Power Systems have been supported by numerous independent models of the real world network. As a result of increasing competition in this sector, however, the integration of technologies in the network and the coordination of complex management processes have become of vital importance for all electrical power companies. The aim of the research outlined in this paper is to develop a single network model which will unify the generation, transmission and distribution infrastructure layers and the various alternative implementation technologies. This 'unified model' approach can support ,for example, network fault, reliability and performance analysis. This paper introduces the basic network structures, describes an object-oriented modelling approach and outlines possible applications of the unified model

A Novel Nanocomposite with Photo-Polymerization for Wafer Level Application

©2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or distribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.A novel nanocomposite photo-curable material which can act both as a photoresist and a stress redistribution layer applied on the wafer level was synthesized and studied. In the experiments, 20-nm silica fillers were modified by a silane coupling agent through a hydrolysis and condensation reaction and then incorporated into the epoxy matrix. A photo-sensitive initiator was added into the formulation which can release cations after ultraviolet exposure and initiate the epoxy crosslinking reaction. The photo-crosslinking reaction of the epoxy made it a negative tone photoresist. The curing reaction of the nanocomposites was monitored by a differential scanning calorimeter with the photo-calorimetric accessory. The thermal mechanical properties of photo-cured nanocomposites thin film were also measured. It was found that the moduli change of the nanocomposites as the filler loading increasing did not follow the Mori–Tanaka model, which indicated that the nanocomposite was not a simple two-phase structure as the composite with micron size filler. The addition of nano-sized silica fillers reduced the thermal expansion and improved the stiffness of the epoxy, with only a minimal effect on the optical transparency of the epoxy, which facilitated the complete photo reaction in the epoxy

Update of an early warning fault detection method using artificial intelligence techniques

This presentation describes a research investigation to access the feasibility of using an Artificial Intelligence (AI) method to predict and detect faults at an early stage in power systems. An AI based detector has been developed to monitor and predict faults at an early stage on particular sections of power systems. The detector for this early warning fault detection device only requires external measurements taken from the input and output nodes of the power system. The AI detection system is capable of rapidly predicting a malfunction within the system. Artificial Neural Networks (ANNs) are being used as the core of the fault detector. In an earlier paper [11], a computer simulated medium length transmission line has been tested by the detector and the results clearly demonstrate the capability of the detector. Today’s presentation considers a case study illustrating the suitability of this AI Technique when applied to a distribution transformer. Furthermore, an evolutionary optimisation strategy to train ANNs is also briefly discussed in this presentation, together with a ‘crystal ball’ view of future developments in the operation and monitoring of transmission systems in the next millennium

Power system fault prediction using artificial neural networks

The medium term goal of the research reported in this paper was the development of a major in-house suite of strategic computer aided network simulation and decision support tools to improve the management of power systems. This paper describes a preliminary research investigation to access the feasibility of using an Artificial Intelligence (AI) method to predict and detect faults at an early stage in power systems. To achieve this goal, an AI based detector has been developed to monitor and predict faults at an early stage on particular sections of power systems. The detector only requires external measurements taken from the input and output nodes of the power system. The AI detection system is capable of rapidly predicting a malfunction within the system . Simulation will normally take place using equivalent circuit representation. Artificial Neural Networks (ANNs) are used to construct a hierarchical feed-forward structure which is the most important component in the fault detector. Simulation of a transmission line (2-port circuit ) has already been carried out and preliminary results using this system are promising. This approach provided satisfactory results with accuracy of 95% or higher

Early warning fault detection using artificial intelligent methods

This paper describes a research investigation to access the feasibility of using an Artificial Intelligence (AI) method to predict and detect faults at an early stage in power systems. An AI based detector has been developed to monitor and predict faults at an early stage on particular sections of power systems. The detector for this early warning fault detection device only requires external measurements taken from the input and output nodes of the power system. The AI detection system is capable of rapidly predicting a malfunction within the system. Artificial Neural Networks (ANNs) are being used as the core of the fault detector. A simulated medium length transmission line has been tested by the detector and the results demonstrate the capability of the detector. Furthermore, comments on an evolutionary technique as the optimisation strategy for ANNs are included in this paper