1,496 research outputs found

    A Mathematica Package for Computing N=2 Superfield Operator Product Expansions

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    We describe a general purpose Mathematica package for computing Superfield Operator Product Expansions in meromorphic N=2N=2 superconformal field theory. Given the SOPEs for a set of ``basic" superfields, SOPEs of arbitrarily complicated composites can be computed automatically. Normal ordered products are always reduced to a standard form. It is possible to check the Jacobi identities, and to compute Poisson brackets (``classical SOPEs''). We present two explicit examples: a construction of the ``small'' N=4N=4 superconformal algebra in terms of N=2N=2 superfields, and a realisation of the N=2N=2 superconformal algebra in terms of chiral and antichiral fermionic superfields.Comment: 15 pages, LaTeX. Minor corrections, particularly to Mathematica output Out[6],Out[9] in section 4. Available through anonymous ftp from ftp://euclid.tp.ph.ic.ac.uk/papers/ or on WWW at http://euclid.tp.ph.ic.ac.uk/Papers

    Gauging Conformal Algebras with Relations between the Generators

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    We investigate the gauging of conformal algebras with relations between the generators. We treat the W5/2W_{5/2}--algebra as a specific example. We show that the gauge-algebra is in general reducible with an infinite number of stages. We show how to construct the BV-extended action, and hence the classical BRST charge. An important conclusion is that this can always be done in terms of the generators of the WW--algebra only, that is, independent of the realisation. The present treatment is still purely classical, but already enables us to learn more about reducible gauge algebras and the BV-formalism.Comment: 10 pages, LaTex, This paper is based on proceedings for the Sixth Seminar on Quantum Gravity, Moscow, 12-17 June '95 and the Conference on Gauge theories, Applied Supersymmetry and Quantum Gravity, Leuven, 10-14 July '9

    An area-time efficient FPGA-implementation of online finite-set model based predictive controllers for flying capacitor inverters

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    Recently there has been an increase in the use of model-based predictive control (MBPC) for power-electronic converters. Especially for flying-capacitor multilevel converters (FCC) this offers an interesting possibility to simultaneously control output current and the capacitor voltages. The computational burden however is very high and often restrictive for a good implementation. In this paper a time and resource efficient design methodology is presented for the FPGA implementation of FCC MBPC. The control is fully implemented in programmable digital logic. Due to a parallel processing for the three converter phases and a fully pipelined calculation of the prediction stage an area-time efficient implementation is realized. Furthermore, this is achieved by using a high-level design tool. The implementation aspects for 3, 4 and 5-level FC inverters are discussed, with a focus on the 4-level case

    Flying-capacitor multilevel converter voltage balance dynamics for pure resistive load

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    Multilevel converters need voltage balancing to be able to generate an output voltage with high quality. Flying capacitor converter topology has a natural voltage balancing property. Voltage balance dynamics analytical research methods reported to date are essentially based on a frequency domain analysis using double fourier transform. These complicated methods are not truly analytical, which makes an understanding of parameter influence on time constants difficult. In this paper, a straightforward time domain approach based on stitching of switch intervals piece-wise analytical solutions to a DC modulated H-bridge flying capacitor converter is discussed. This method allows to obtain time-averaged discrete and continuous voltage balance dynamics models. Using small-parameter approximation for pure resistive loads, simple and accurate expressions for voltage balance time constants are deduced, revealing their dependence on load parameters, carrier frequency and duty ratio

    Self-precharge in single-leg flying capacitor converters

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    Flying Capacitor (FC) multilevel pulse width modulated (PWM) converters are an attractive choice due to the natural voltage balance property. During start-up of the converter, care has to be taken that the power switches are not exposed to voltage overstress due to uncharged capacitors. A flying capacitor self-precharge technique is proposed which, by making use of natural balancing and a DC-bus rate control, makes the capacitors balance with a zero average load current. The DC-bus rate control depends on the capacitor voltage balance dynamics. The regular PWM natural balancing technique gives good results for even-level single-leg converter self-precharge, for odd-level converters a special switching pattern is necessary

    Design and combined rail-structure response of a new high speed railway bridge

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    Improved natural balancing with modified phase shifted PWM for single-leg five-level flying-capacitor converters

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    Flying capacitor converters (FCCs), as most multilevel converter topologies, require a balancing mechanism of the capacitor voltages. FCCs have the valuable property of natural voltage balancing when a special modulation technique is used. The classic methods, like Phase-Shifted Pulse Width Modulation (PS-PWM), result in very slow balancing for some duty ratio ranges. Previous work showed that for a single-leg five-level FCC one time constant is infinite for a zero desired output voltage. In this paper, a modified PS-PWM scheme for a single-leg fivelevel FCC is presented which results in faster balancing over the total duty ratio range. The modified PS-PWM scheme is studied, resulting in an averaged voltage balancing model. This model is verified using simulations and experiments. The modified PS-PWM scheme solves the slow balancing problems of the normal PS-PWM method for odd-level FCCs, while maintaining the passive control property, and it provides a self-precharge capability
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