Real time plasma disruptions detection in JET implemented with the ITMS platform using FPGA based IDAQ

The use of FPGAs in data acquisition cards for processing purposes allows an efficient real time pattern recognition algorithm implementation. Using 13 JETs database waveforms an algorithm for detecting incoming plasma disruptions has been implemented. This algorithm is written in MATLAB using floating point representation. In this work we show the methodology used to implement the real time version of the algorithm using Intelligent Data Acquisition Cards (IDAQ), DAQ devices with field programmable gate array (FPGA) for local processing. This methodology is based on the translation of the MATLAB code to LabVIEW and the final coding of specific pieces of code in LabVIEW for FPGA in fixed point format. The whole system for evaluating the real time disruption detection (RTDD) has been implemented using the Intelligent Test and Measurement System (ITMS) platform. ITMS offers distributed data acquisition, distribution and real time processing capabilities with advanced, but easy to use, software tools that simplify application development and system setup. The RTDD implementation uses a standard PXI/PXIe architecture. Two 8 channel analog output cards play JETs database signals, two 8 channel DAQ with FPGA acquire signals and computes a feature vector based in FFT analysis. Finally the vector acquired is used by the system CPU to execute a pattern recognition algorithm to estimate an incoming disruption

Exploiting graphic processing units parallelism to improve intelligent data acquisition system performance in JET's correlation reflectometer

The performance of intelligent data acquisition systems relies heavily on their processing capabilities and local bus bandwidth, especially in applications with high sample rates or high number of channels. This is the case of the self adaptive sampling rate data acquisition system installed as a pilot experiment in KG8B correlation reflectometer at JET. The system, which is based on the ITMS platform, continuously adapts the sample rate during the acquisition depending on the signal bandwidth. In order to do so it must transfer acquired data to a memory buffer in the host processor and run heavy computational algorithms for each data block. The processing capabilities of the host CPU and the bandwidth of the PXI bus limit the maximum sample rate that can be achieved, therefore limiting the maximum bandwidth of the phenomena that can be studied. Graphic processing units (GPU) are becoming an alternative for speeding up compute intensive kernels of scientific, imaging and simulation applications. However, integrating this technology into data acquisition systems is not a straight forward step, not to mention exploiting their parallelism efficiently. This paper discusses the use of GPUs with new high speed data bus interfaces to improve the performance of the self adaptive sampling rate data acquisition system installed on JET. Integration issues are discussed and performance evaluations are presente

Implementation of local area network extension for instrumentation standard trigger capabilities in advanced data acquisition platforms

Synchronization mechanisms are an essential part of the real-time distributed data acquisition systems (DASs) used in fusion experiments. Traditionally, they have been based on the use of digital signals. The approach known as local area network extension for instrumentation (LXI) provides a set of very powerful synchronization and trigger mechanisms. The Intelligent Test Measurement System (ITMS) is a new platform designed to implement distributed data acquisition and fast data processing for fusion experiments. It is based on COMPATPCI technology and its extension to instrumentation (PXI). Hardware and software elements have been developed to include LXI trigger and synchronization mechanisms in this platform in order to obtain a class A LXI instrument. This paper describes the implementation of such a system, involving the following components: commercial hardware running a Linux operating system; a real-time extension to an operating system and network (RTAI and RTNET), which implements a software precision time protocol (PTP) using IEEE1588; an ad hoc PXI module to support hardware implementation of PTP-IEEE 1588; and the multipoint, low-voltage differential signaling hardware LXI trigger bus. ©2008 American Institute of Physic

Configuration and supervision of advanced distribuited data adquisition and processing systems for long pulse experiments using JINI technology.

The development of tools for managing the capabilities and functionalities of distributed data acquisition systems is essential in long pulse fusion experiments. The intelligent test and measurement system (ITMS) developed by UPM and CIEMAT is a technology that permits implementation of a scalable data acquisition and processing system based on PXI or CompactPCI hardware. Several applications based on JINI technology have been developed to enable use of this platform for extensive implementation of distributed data acquisition and processing systems. JINI provides a framework for developing service-oriented, distributed applications. The applications are based on the paradigm of a JINI federation that supports mechanisms for publication, discovering, subscription, and links to remote services. The model we implemented in the ITMS platform included services in the system CPU (SCPU) and peripheral CPUs (PCPUs). The resulting system demonstrated the following capabilities: (1) setup of the data acquisition and processing to apply to the signals, (2) information about the evolution of the data acquisition, (3) information about the applied data processing and (4) detection and distribution of the events detected by the ITMS software applications. With this approach, software applications running on the ITMS platform can be understood, from the perspective of their implementation details, as a set of dynamic, accessible, and transparent services. The search for services is performed using the publication and subscription mechanisms of the JINI specification. The configuration and supervision applications were developed using remotely accessible (LAN or WAN) objects. The consequence of this approach is a hardware and software architecture that provides a transparent model of remote configuration and supervision, and thereby a means to simplify the implementation of a distributed data acquisition system with scalable and dynamic local processing capability developed in a fusion environment

Self-adaptive sampling rate data acquisition in JET’s correlation reflectometer

Data acquisition systems with self-adaptive sampling rate capabilities have been proposed as a solution to reduce the shear amount of data collected in every discharge of present fusion devices. This paper discusses the design of such a system for its use in the KG8B correlation reflectometer at JET. The system, which is based on the ITMS platform, continuously adapts the sample rate during the acquisition depending on the signal bandwidth. Data are acquired continuously at the expected maximum sample rate and transferred to a memory buffer in the host processor. Thereafter the rest of the process is based on software. Data are read from the memory buffer in blocks and for each block an intelligent decimation algorithm is applied. The decimation algorithm determines the signal bandwidth for each block in order to choose the optimum sample rate for that block, and from there the decimation factor to be used. Memory buffers are used to adapt the throughput of the three main software modules _data acquisition, processing, and storage_ following a typical producer-consumer architecture. The system optimizes the amount of data collected while maintaining the same information. Design issues are discussed and results of performance evaluation are presented

Design of an advanced intelligent instrument with waveform recognition based on the ITMS platform

Searching for similar behavior in previous data plays a key role in fusion research, but can be quite challenging to implement from a practical point of view. This paper describes the design of an intelligent measurement instrument that uses similar waveform recognition systems (SWRS) to extract knowledge from the signals it acquires. The system is perceived as an Ethernet measurement instrument that permits to acquire several waveforms simultaneously and to identity similar behaviors by searching in previous data using distributed SWRS. The implementation is another example of the advantages that local processing capabilities can provide in data acquisition applications

Integration of embedded data processing algorithms inside PAMELA devices

PAMELA (Phased Array Monitoring for Enhanced Life Assessment) SHMTM System is an integrated embedded ultrasonic guided waves based system consisting of several electronic devices and one system manager controller. The data collected by all PAMELA devices in the system must be transmitted to the controller, who will be responsible for carrying out the advanced signal processing to obtain SHM maps. PAMELA devices consist of hardware based on a Virtex 5 FPGA with a PowerPC 440 running an embedded Linux distribution. Therefore, PAMELA devices, in addition to the capability of performing tests and transmitting the collected data to the controller, have the capability of perform local data processing or pre-processing (reduction, normalization, pattern recognition, feature extraction, etc.). Local data processing decreases the data traffic over the network and allows CPU load of the external computer to be reduced. Even it is possible that PAMELA devices are running autonomously performing scheduled tests, and only communicates with the controller in case of detection of structural damages or when programmed. Each PAMELA device integrates a software management application (SMA) that allows to the developer downloading his own algorithm code and adding the new data processing algorithm to the device. The development of the SMA is done in a virtual machine with an Ubuntu Linux distribution including all necessary software tools to perform the entire cycle of development. Eclipse IDE (Integrated Development Environment) is used to develop the SMA project and to write the code of each data processing algorithm. This paper presents the developed software architecture and describes the necessary steps to add new data processing algorithms to SMA in order to increase the processing capabilities of PAMELA devices.An example of basic damage index estimation using delay and sum algorithm is provided

Algorithms hardware implementation for ultrasonic data processing in SHM system

Nowadays, devices that monitor the health of structures consume a lot of power and need a lot of time to acquire, process, and send the information about the structure to the main processing unit. To decrease this time, fast electronic devices are starting to be used to accelerate this processing. In this paper some hardware algorithms implemented in an electronic logic programming device are described. The goal of this implementation is accelerate the process and diminish the information that has to be send. By reaching this goal, the time the processor needs for treating all the information is reduced and so the power consumption is reduced too

Hardware timestamping for image acquisition system based on FlexRIO and IEEE 1588 v2 Standard

Current fusion devices consist of multiple diagnostics and hundreds or even thousands of signals. This situation forces on multiple occasions to use distributed data acquisition systems as the best approach. In this type of distributed systems, one of the most important issues is the synchronization between signals, so that it is possible to have a temporal correlation as accurate as possible between the acquired samples of all channels. In last decades, many fusion devices use different types of video cameras to provide inside views of the vessel during operations and to monitor plasma behavior. The synchronization between each video frame and the rest of the different signals acquired from any other diagnostics is essential in order to know correctly the plasma evolution, since it is possible to analyze jointly all the information having accurate knowledge of their temporal correlation. The developed system described in this paper allows timestamping image frames in a real-time acquisition and processing system using 1588 clock distribution. The system has been implemented using FPGA based devices together with a 1588 synchronized timing card (see Fig.1). The solution is based on a previous system [1] that allows image acquisition and real-time image processing based on PXIe technology. This architecture is fully compatible with the ITER Fast Controllers [2] and offers integration with EPICS to control and monitor the entire system. However, this set-up is not able to timestamp the frames acquired since the frame grabber module does not present any type of timing input (IRIG-B, GPS, PTP). To solve this lack, an IEEE1588 PXI timing device its used to provide an accurate way to synchronize distributed data acquisition systems using the Precision Time Protocol (PTP) IEEE 1588 2008 standard. This local timing device can be connected to a master clock device for global synchronization. The timing device has a buffer timestamp for each PXI trigger line and requires tha- a software application assigns each frame the corresponding timestamp. The previous action is critical and cannot be achieved if the frame rate is high. To solve this problem, it has been designed a solution that distributes the clock from the IEEE 1588 timing card to all FlexRIO devices [3]. This solution uses two PXI trigger lines that provide the capacity to assign timestamps to every frame acquired and register events by hardware in a deterministic way. The system provides a solution for timestamping frames to synchronize them with the rest of the different signals

Implementation of intelligent data acquisition system for ITER fast controllers using RIO devices.

A basic requirement of the data acquisition systems used in long pulse fusion experiments is the real time physical events detection in signals. Developing such applications is usually a complex task, so it is necessary to develop a set of hardware and software tools that simplify their implementation. This type of applications can be implemented in ITER using fast controllers. ITER is standardizing the architectures to be used for fast controller implementation. Until now the standards chosen are PXIe architectures (based on PCIe) for the hardware and EPICS middleware for the software. This work presents the methodology for implementing data acquisition and pre-processing using FPGA-based DAQ cards and how to integrate these in fast controllers using EPICS