Simulation, fabrication and characterization of PMOS transistor device

In a low supply voltage CMOS technology, it is desirable to scale threshold voltage and gate length for improving circuit performance. Therefore, a project has been carried out inside KUiTTHO's microelectronic cleanroom to produce a method that has better l ow power/low voltage current concentrate on p-channel (PMOS). An experiment was also done to determine the right parameter value to b e used for fabrication process such as oxidation process thickness rate, sheet resistance and metal thickness. From the parameter value obtained, 0.3 m m and 0.5 mm PMOS transistor had been successfully produced. Fabrication simulation was performed to produce a 0.1 |am and 0.3p.m PMOS transistor by using the ISE-TCAD software. The trade off between threshold voltage (VTH), gate length (LG) and thin oxide thickness (tox) are discussed to determine the characteristics of the transistors. It shows that for 0.3mm (toX = 860A) PMOS transistor the value of VT H =-3.33V and 0.5 mm ( t ^ = 910A), VT H value =-4.3V. From the simulation result show for 0.1 jim (to* = 200A), VT H = - 0 . 3 1 4V and for 0 . 5 | im (400A) Vt h = -0.634V. The result shows that, with decreasing gate length and oxide thickness will produce lower value of threshold voltage. Minimum value of threshold voltage can result in a better performance of transistor. Another parameter must be taken into consideration such as leakage current, resistivity and conductivity to get a better design of PMOS transistor in future research

Input range driver for measurement of a differential 10 bit SAR ADC

Imbalance and out-of-range input signals can cause inaccuracy in fully differential successive approximation (SAR) analog to digital converter (ADC). Therefore, implementation of an ADC driver can solve the problem since the input can be properly adjusted to suit with an ADC input. AD8139 single to differential amplifier was chosen as an ADC driver in this design and placed on a printed circuit board (PCB) to drive differential input signal of SAR ADC. The result shows each of output amplitude of the amplifier remains equal and is 180° out of phase for DC and AC input signal. The fabricated 10 bit SAR ADC is capable to digitize full code from analog input produced by the ADC driver

High accuracy dual output voltage reference circuit for differential 10-bit successive approximation register analog to digital converter using 180nm technology

Voltage reference circuit produces reference voltage that is independent of fabrication process, temperature and supply voltage (PVT) variation. Differential successive approximation register (SAR) analog to digital converter (ADC) that converts an analog signal to digital signal is very much dependent on accurate reference voltage which defines the resolution of the converter. It requires two reference voltages namely VREF and VCM. VREF is used to set the full-scale voltage range while the common-mode voltage, VCM defines an initial value of most significant bit (MSB) digital output. VCM is designed as such that it is half of VREF and independent of process, voltage and temperature (PVT) variations. The deviation of the VCM develops an offset that shifts the transfer function of the ADC. Consequently, it reduces the dynamic range of the analog input to be digitised. The evolution of technology has favoured in a system on chip integration of the voltage reference and SAR ADC because it reduces design circuit area and consumes less power. However, based on the previous literatures, the impact of voltage reference circuits integrated with SAR ADC on a single die has not been discussed in depth. Hence, this thesis features the design and implementation of a high accuracy dynamic dual output voltage reference circuit for a 200kS/s differential 10-bit SAR ADC using a Silterra 0.18μm process with a supply voltage of 1.8V on a common die. The measurement of the fabricated chips is able to generate constant reference voltages for the VREF is that 1.2V±0.03V. Meanwhile, the VCM deviates as much as ±4mV between temperatures ranging from 0 C and 80 C across ±10% voltage supply variation. The measurement result shows that the circuit have sufficient drive capability to provide dual reference voltages to the SAR ADC. The voltage reference circuit achieves a good performance on the SAR ADC with 0.4LSB differential nonlinearity (DNL), 57.39dB Signal-to-noise and distortion ratio (SINAD) and an effective number of bits (ENOB) of 9.5 bits. The voltage reference circuit functions accurately in temperature sensor application between 0 C and 80 C temperature input range

Differential input range driver for SAR ADC measurement setup

Differential successive approximation register (SAR) of analog to digital converter (ADC) requires two balancing input signals that have same amplitude with 180⁰ out of phase. Otherwise, it performs inaccurately and degrades the performance during ADC testing procedure. Therefore, an implementation of AD8139 chip single to differential amplifier was chosen as an ADC driver to generate sufficient differential output for the ADC. The chip was placed on a printed circuit board (PCB) to test the functionality as well as the performance of static and dynamic SAR ADC. The result shows that the single-ended input transform into differential voltage outputs. The amplitudes for the amplifier remain equal and is 180° out of phase for DC and AC voltage input signal. Besides, the fabricated 0.18µm CMOS technology of differential 10-bit SAR ADC is capable of digitising full code digital output and perform 9.5-bit effective number of bit (ENOB) from analog input driving by the ADC driver