Integrated face detection, tracking, and pose estimation

This paper presents a proposal of an integrated method for face detection, tracking, and head pose estimation. We use the de-facto Viola-Jones method for face and face part detection. We adopt affine motion model estimation as a tracking method. The combination enables efficient detection around the search area limited by tracking. Moreover, it reduces false detection because of the consistent processing with earlier results. In addition, the method re-initializes the position and size of the face and face parts in every frame. That initialization immediately corrects tracking jitter. The head pose is estimated using coordinates of both eyes and a mouth relative to the nose as the origin in the coordinate system. The computational cost is low because it uses only those three points. Experimental results show accurate estimation of the head pose. The average error is 6.50 deg in yaw angle, and 7.65 deg in pitch angle. © 2012 IEEE

Vehicle detection and tracking with affine motion segmentation in stereo video

This paper proposes a novel method for vehicle detection and tracking based on stereo vision, motion analysis, and road detection. Combining stereo vision with motion analysis makes object detection more appropriate than each individual method. Object tracking with motion estimation, which follows the next object detection starting with an initial solution given by the tracking, improves detection accuracy. Road detection with motion segmentation, considering a parallax in stereo vision as a motion, enables on-road vehicle and obstacle detection. All elements constructing the proposed method are founded commonly on affine motion segmentation. Software and hardware implementations become efficient because their parts share the common principal procedure. Simulation results show the proposed method successfully detects and tracks vehicles on moving background in a complicated scene of downtown. © 2011 IEEE

Baseline serum PINP level is associated with the increase in hip bone mineral density seen with Romosozumab treatment in previously untreated women with osteoporosis

Summary: Baseline serum PINP value was significantly and independently associated with the increased bone mineral density (≥ 3%) in both total hip and femoral necks by 12 months of romosozumab treatment in patients with treatment-naive postmenopausal osteoporosis. Purpose: Some patients fail to obtain a sufficiently increased hip bone mineral density (BMD) by romosozumab (ROMO) treatment. This study aimed to investigate the prognostic factor for increased hip BMD with ROMO in patients with treatment-naive postmenopausal osteoporosis. Methods: This prospective, observational, and multicenter study included patients (n = 63: mean age, 72.6 years; T-scores of the lumbar spine [LS], − 3.3; total hip [TH], − 2.6; femoral neck [FN], − 3.3; serum type I procollagen N-terminal propeptide [PINP], 68.5 µg/L) treated by ROMO for 12 months. BMD and serum bone turnover markers were evaluated at each time point. A responder analysis was performed to assess the patient percentage, and both univariate and multivariate analyses were performed to investigate the factors associated with clinically significant increased BMD (≥ 3%) in both TH and FN. Results: Percentage changes of BMD from baseline in the LS, TH, and FN areas were 17.5%, 4.9%, and 4.3%, respectively. In LS, 96.8% of patients achieved ≥ 6% increased LS-BMD, although 57.1% could not achieve ≥ 3% increased BMD in either TH or FN. Multiple regression analysis revealed that only the baseline PINP value was significantly and independently associated with ≥ 3% increased BMD in both TH and FN (p = 0.019, 95% confidence interval = 1.006–1.054). The optimal cut-off PINP value was 53.7 µg/L with 54.3% sensitivity and 92.3% specificity (area under the curve = 0.752). Conclusions: In a real-world setting, baseline PINP value was associated with the increased BMD of TH and FN by ROMO treatment in treatment-naive patients.This version of the article has been accepted for publication, after peer review (when applicable) and is subject to Springer Nature’s AM terms of use, but is not the Version of Record and does not reflect post-acceptance improvements, or any corrections. The Version of Record is available online at: https://doi.org/10.1007/s00198-022-06642-1Kashii M., Kamatani T., Nagayama Y., et al. Baseline serum PINP level is associated with the increase in hip bone mineral density seen with Romosozumab treatment in previously untreated women with osteoporosis. Osteoporosis International 34, 563 (2023

A VLSI architecture for VGA 30 fps video segmentation with affine motion model estimation

金沢大学理工研究域電子情報学系This paper proposes a VLSI architecture for VGA 30 fps video segmentation with affine motion model estimation. The adopted algorithm is formulated as a contextual statistical labeling problem exploiting multiscale Markov random field (MRF) models. The algorithm optimization for VLSI implementation is characterized by image division method, ICM labeling limited to region boundary, and omission of motion models estimation for new regions. The optimization reduces the computational costs by 82 %, the amount of memory by 95 %, and the amount of data traffic by 99 % without accuracy degradation. The VLSI architecture is characterized by pipeline processing of the divided images, concurrent motion models estimation for multiple regions, and a common processing element of update and detection labeling. The architecture enables VGA 30 fps video segmentation with 167 MHz frequency. The estimated core area using 0.18μm technology is 30 mm2. This processor is applicable to the video recognition applications such as vehicle safety, robot, and surveillance systems under the restriction of energy consumption

Adiabatic SRAM with a large margin of VT variation by controlling the cell-power-line and word-line voltage

金沢大学理工研究域電子情報学系An adiabatic 1-kb SRAM circuit was designed, which enables gradual charging during writing and reading while maintaining a large VDD so that the problems of VT variation and electromigration in the nanocircuit can be resolved. In the writing mode, the voltage of the memory cell power line is reduced to ground gradually using a high-resistivity nMOSFET, and we turn off the nMOSFET so that the memory cell power line is set in a high-impedance state. Then, we can write data easily by inputting adiabatic signal from one bit line, while the other bit line is set to ground. For reading, a verifying operation is proposed for resolving the electromigration problem. The word line voltage is changed stepwise while the voltages of the bit lines are verified. The reading method enables a gradual current flow in the memory cell. We designed the cell layout and found that there is no area penalty. In addition, a new charge recycle circuit with tank capacitors is proposed. ©2009 IEEE

Energy dissipation decrease during adiabatic charging of a capacitor by changing the duty ratio

Adiabatic charging of a capacitor with a step down converter by changing the duty ratio is considered. First, for a profound understanding of the circuit, the general analytical solution of step down converter is considered. It is confirmed that the system can be resolved analytically and that the equilibrium state of current and voltage are consistent with SPICE simulation. Next, adiabatic charging by changing the duty ratio is investigated. From SPICE simulation, it is confirmed that energy dissipation is reduced to one-fourth when four-step charging is used. By increasing the step number, energy dissipation decreases to zero and dissipationless operation is achieved. Adiabatic charging of a capacitor with a step down converter by changing the duty ratio is considered. First, for a profound understanding of the circuit, the general analytical solution of step down converter is considered. It is confirmed that the system can be resolved analytically and that the equilibrium state of current and voltage are consistent with SPICE simulation. Next, adiabatic charging by changing the duty ratio is investigated. From SPICE simulation, it is confirmed that energy dissipation is reduced to one-fourth when four-step charging is used. By increasing the step number, energy dissipation decreases to zero and dissipationless operation is achieved. © 2011 IEEE

Increasing static noise margin of single-bit-line SRAM by lowering bit-line voltage during reading

A 64-kb SRAM circuit with a single bit line (BL) for reading and with two BLs for writing was designed. Single-BL reading is achieved by using a left access transistor and a left shared reading port. We designed the cell layout and confirmed that there is no area penalty for producing two word lines in a memory cell. An analysis of butterfly plots clearly confirms that the single-BL SRAM has the larger static noise margin than the two-BL one. It is confirmed that the static noise margin in the single-BL SRAM is further increased when the BL is precharged to not VDD but to the lower value in the range of VDD/2 to 3VDD/4. In addition, a new sense amplifier circuit without reference voltage is proposed for single-BL reading. We also propose a divided word line architecture for writing to maintain the static noise margin for unwritten blocks. © 2011 IEEE

Simultaneous enlargement of SRAM read/write noise margin by controlling virtual ground lines

金沢大学理工研究域電子情報学系The SRAM operating margin in 65nm technology is analyzed. The peak characteristic in the read margin versus the supply voltage was found to be caused by the channel length modulation effect. Controlling the memory cell virtual ground line proved to be effective in enlarging the operating margin simultaneously in the read and the write operations. A simple o ptimum circuit which does not require any dynamic voltage c ontrol is proposed, realizing an improvement in the operating m argin comparable to conventional circuits requiring dynamic voltage control. © 2010 IEEE

輝度変化にロバストな高速オプティカルフローアルゴリズムのFPGA実装

金沢大学理工研究域電子情報学系オプティカルフローは動画像における連続する2フレーム間の画素ごとの動きベクトルである．本稿は輝度変化にロバストで高速なオプティカルフロー推定アルゴリズムを提案する．輝度変化量を差分平均により求め，時間輝度勾配を補正し，ロバスト化を図る．初期値設定法，階層処理法，ウィンドウサイズの最適化により処理の高精度化と高速化を図る．シミュレーションの結果，輝度変化を加えた場合の平均角度誤差は18.65°から4.29°に大きく改善され，ロバスト性を確認した．輝度変化を加えず精度を同程度とした場合のCPU実行時間は従来の15%となり，高速性を確認した．更に本アルゴリズムに基づく専用回路構成を提案し，FPGA実装する．提案回路は従来回路より輝度変化にロバストなうえに，同程度の精度とスループット性能を仮定したとき，動作周波数が20%，面積が45%未満，電力が9%未満に削減される．本回路は実時間画像認識や画像再構成に応用可能である． An optical flow is defined as a motion vector for each pixel between successive two images in a video. This paper proposes a fast optical flow algorithm with robustness for luminance change. The algorithm includes the luminance change estimation, initial vector decision, fast hierarchical processing, and window size optimization. These methods result in the robustness for the luminance change, accurate flow estimation, and low computational costs. Simulation results show the flow accuracy improves from 18.65° to 4.29°, when giving luminance change. The CPU execution time reduces to 15% compared to the conventional with the same accuracy. In addition, we propose a dedicated architecture based on this algorithm and implement it on an FPGA. Experimental results show the new architecture decreases the operating frequency to 20%, the circuit area to 45%, and the power consumption to 9%. This circuit is applicable to real-time image recognition and image reconstruction. © 2011, The Institute of Image Electronics Engineers of Japan. All rights reserved