Concrete Carbonation and Chloride Resistance Under Initial Hot Water Curing

Three concrete mix proportions were designed and prepared, respectively, such as fly ash concrete (abbreviated as “FAC”) with 30% fly ash replacement ratio of cement, fly ash, and slag concrete (abbreviated as “FSC”) with each of 20% fly ash and slag replacement ratio and ordinary Portland cement concrete (abbreviated as “OPC”) for the research of carbonation and chloride resistance of concrete under different initial hot water curing. Specimens with precuring were put into 20°C water tank for curing firstly until a certain compressive strength of 14 MPa reached after demolding, while specimens without precuring were put into 40, 60, and 80°C water tanks for curing directly just after demolding. Hot water curing of each specimen was finished when the designed compressive strength of 35 MPa was reached, then specimens were taken out into indoor natural environment. High concentration CO2 carbonation and Coulomb electric flux experiments were carried out at specimens’ 100-day age. Results show that with the addition of fly ash or slag, the carbonation resistance of concrete declines, whereas the resistance to chlorides is improved. With the increasing of initial water-curing temperature from 40 to 80°C, the carbonation and chloride resistance of OPC concrete all decrease, whereas for FAC and FSC concretes, the carbonation resistance declines and chloride resistance goes up. Precuring at the normal temperature before the elevated temperature water curing is beneficial for concrete long-term carbonation and chloride resistance

Design and Optimization of Asymmetric Grating Assisted Slot Microring

In this paper, a slot microring with an asymmetric grating structure is proposed. Through the coupling between the grating and the slot microring, a high free spectral range or EIT-like effects with a high quality factor can be achieved in the same device. The grating is designed as an asymmetric structure to realize the modulation of the optical signal and the control of the resonance peak by changing the grid number, and the effect of different grating periods on the output spectrum is explored. The results show that changing the grating on slot sidewalls can increase or decrease the number of resonant peaks. By selecting a specific period of the gratings on both sides of the slot, the distance between adjacent resonance peaks can be increased to achieve modulation of the free spectral range. In this paper, depending on the grating period, we obtain a quality factor of 5016 and an FSR of 137 nm, or a quality factor of 10,730 and an FSR of 92 nm. The refractive index sensing simulation is carried out for one of the periods, which can achieve a sensitivity of 370 nm/RIU. Therefore, the proposed new structure has certain advantages in different sensing applications

Experimental realization of an optical digital comparator using silicon microring resonators

We propose and experimentally demonstrate a silicon photonic circuit that can perform the comparison operation of two-bit digital signals based on microring resonators (MRRs). Two binary electrical signals regarded as two operands of desired comparison digital signals are applied to three MRRs to modulate their resonances through the microheaters fabricated on the top of MRRs, respectively (here, one binary electrical signal is applied to two MRRs by a 1×2 electrical power splitter, which means that the two MRRs are modulated by the same binary electrical signal). The comparison results of two binary electrical signals can be obtained at two output ports in the form of light. The proposed device is fabricated on a silicon-on-insulator substrate using the complementary metal-oxide-semiconductor fabrication process, and the dynamic characterization of the device with the operation speed of 10 kbps is demonstrated successfully

On-chip optical parity checker using silicon photonic integrated circuits

The optical parity checker plays an important role in error detection and correction for high-speed, large-capacity, complex digital optical communication networks, which can be employed to detect and correct the error bits by using a specific coding theory such as introducing error-detecting and correcting codes in communication channels. In this paper, we report an integrated silicon photonic circuit that is capable of implementing the parity checking for binary string with an arbitrary number of bits. The proposed parity checker consisting of parallel cascaded N micro-ring resonators (MRRs) is based on directed logic scheme, which means that the operands applied to MRRs to control the switching states of the MRRs are electrical signals, the operation signals are optical signals, and the final operation results are obtained at the output ports in the form of light. A 3-bit parity checker with an operation speed of 10 kbps, fabricated on a silicon-on-insulator (SOI) platform using a standard commercial complementary metal-oxide-semiconductor (CMOS) process, was experimentally and successfully demonstrated