Substrate Integrated Bragg Waveguide: an Octave-bandwidth Single-mode Functional Transmission-Line for Millimeter-Wave and Terahertz Applications

We demonstrate an air-core single-mode hollow waveguide that uses Bragg reflector structures in place of the vertical metal walls of the standard rectangular waveguide or via holes of the so-called substrate integrated waveguide. The high-order modes in the waveguide are substantially suppressed by a modal-filtering effect, making the waveguide operate in the fundamental mode over more than one octave. Numerical simulations show that the propagation loss of the proposed waveguide can be lower than that of classic hollow metallic rectangular waveguides at terahertz frequencies, benefiting from a significant reduction in Ohmic loss. To facilitate fabrication and characterization, a proof-of-concept 20 to 45 GHz waveguide is demonstrated, which verifies the properties and advantages of the proposed waveguide. A zero group-velocity dispersion point is observed at near the middle of the operating band. This work offers a step towards a novel hybrid transmission-line medium that can be used in a variety of functional components for broadband millimeter-wave and terahertz applications.Comment: 11 pages, 9 figures, journal articl

Substrate integrated Bragg waveguide: an octave-bandwidth single-mode hybrid transmission line for millimeter-wave applications

We demonstrate an air-core single-mode hollow hybrid waveguide that uses Bragg reflector structures in place of the vertical metal walls of the standard rectangular waveguide or via holes of the so-called substrate integrated waveguide. The high-order modes in the waveguide are substantially suppressed by a modal-filtering effect, making the waveguide operate in the fundamental mode over more than one octave. Numerical simulations show that the propagation loss of the proposed waveguide can be lower than that of classic hollow metallic rectangular waveguides at terahertz frequencies, benefiting from a significant reduction in Ohmic loss. To facilitate fabrication and characterization, a proof-of-concept 20 to 45 GHz waveguide is demonstrated, which verifies the properties and advantages of the proposed waveguide. A zero group-velocity dispersion point is observed at near the middle of the operating band, which is ideal for reducing signal distortion. This work offers a step towards a hybrid transmission-line medium that can be used in a variety of functional components for multilayer integration and broadband applications

Test Generation and Resynthesis Procedures for Test and Diagnosis Quality

Testing and diagnosis are performed to detect and identify manufacturing failures in integrated circuits. In this dissertation, we focus on three important issues in test and diagnosis. The solutions to these issues are implemented using commercial EDA tools. No modification to the commercial tools is required. Thus, they can be easily applied to complex designs with state-of-the-art features. We first address overtesting of delay faults. Overtesting may occur when the circuit is brought into states that cannot be reached during functional operations. We address this issue by generating functional broadside tests using reachable states as scan-in states. Next, we address the issue of improving the resolution of multiple-defect diagnosis by ignoring certain tests. A feature of commercial defect diagnosis tools is used to avoid losing accuracy. Last, we address the issue of avoiding undetectable faults that model potential systematic defects caused by design-for-manufacturability (DFM) guideline violations in a cell-based design. We demonstrate that these undetectable faults tend to cluster in certain areas of the circuit, resulting in circuit areas with low coverage. The missing tests may allow detectable defects in these areas to escape detection. This can impact the defective-parts-per-million (DPPM) and reliability significantly since the defects are likely to be systematic. We address this issue in a cell-based design by eliminating the undetectable faults related to DFM guidelines that are internal and external to cells. We first propose a logic resynthesis procedure to eliminate large clusters of undetectable faults that are internal to cells. Next, we propose a layout resynthesis procedure that eliminates undetectable faults external to cells by making fine changes to the layout so as to fix the corresponding DFM guideline violations