7 research outputs found

    Modeling, Development and Analysis Performance of an Intelligent Control of Photovoltaic System by Fuzzy Logic approach for Maximum Power Point Tracking

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    In this paper, we present an intelligent algorithm based upon Fuzzy Logic method for optimizing and improving the control performance of a   photovoltaic system. The main objective of the proposed system is to pursuit the maximum power point (MPPT) under different conditions like the change of sunshine and temperature. The system consists of a photovoltaic solar module connected to a DC-DC step-up converter "Boost" and a battery - like a load . The converter parameters and the inference rule table are determined to ensure maximum output power. The effectiveness of the proposed system is validated through computer simulations using MATLAB / Simulink software and the obtained results shows that our proposed system has the best performance in term maximum power

    Design, optimization and Real Time implementation of a new Embedded Chien Search Block for Reed-Solomon (RS) and Bose-Chaudhuri-Hocquenghem (BCH) codes on FPGA Board

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    The development of error correcting codes has been a major concern for communications systems. Therefore, RS and BCH (Reed-Solomon and Bose, Ray-Chaudhuri and Hocquenghem) are effective methods to improve the quality of digital transmission. In this paper a new algorithm of Chien Search block for embedded systems is proposed. This algorithm is based on a factorization of error locator polynomial. i.e, we can minimize an important number of logic gates and hardware resources using the FPGA card. Consequently, it reduces the power consumption with a percentage which can reach 40 % compared to the basic RS and BCH decoder. The proposed system is designed, simulated using the hardware description language (HDL) and Quartus development software. Also, the performance of the designed embedded Chien search block for decoder RS\BCH (255, 239) has been successfully verified by implementation on FPGA board

    EVALUATION ET AMELIORATION D'UN SYSTEME DE TATOUAGE AUDIO BASE SUR LA TECHNIQUE DE TATOUAGE PAR INSERTION D’ECHO

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    De nos jours le traitement des fichiers numériques est devenu très répandu. Les outils et logiciels pour dupliquer et redistribuer les fichiers numériques sont disponibles pour tout le monde et accessibles à faible coûts. Dans ce contexte, de nombreuses techniques ont vu le jour afin de contribuer à la protection de la propriété intellectuelle et lutter contre le piratage. Parmi, ces techniques nous trouvons les techniques de tatouage numérique des signaux, dit aussi WATERMARKING.Dans ce papier, nous avons réalisé la conception d’un système de tatouage par insertion d’écho et étudier ses performances par simulation sur MATLAB. L'idée principale de cette méthode est de cacher des données à l’intérieur d’un signal en insérant un écho de ce signal avec le retard approprié. Les tests de perceptibilité montrent que les filigranes sont imperceptibles. Les tests de fidélité montrent que la quantité de distorsion introduite par le tatouage est faible. Les tests de robustesse révèlent une bonne réponse face aux distorsions de signal les plus usuels. Les informations cachées sont toujours détectables et récupérables

    PERFORMANCE COMPARISON OF NEW DESIGNS OF CHIEN SEARCH AND SYNDROME BLOCKS FOR BCH AND REED SOLOMON CODES

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    Error correcting codes constitute one of the core technologies in telecommunications field, especially digital communication applications. The objective of this paper is to compare performance among new designs of chien search block on the one hand and syndrome architectures on the other hand in error correcting codes. All comparison of all designs is made by computing the number of logic, bit error rate values and number of iteration in the case of syndrome architectures Analysis results show that the performances of the new designs based on both second factorization method and Three-Parallel Syndrome architecture are superior to the performances of traditional designs

    A Robust Embedded Non-Linear Acoustic Noise Cancellation (ANC) Using Artificial Neural Network (ANN) for Improving the Quality of Voice Communications

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    Embedded Acoustic Noise Cancellation (ANC) has enjoyed remarkable success in the telecommunication field, and it becomes an essential component in various communications applications, such as digital transmission. So, it is an efficient method used to enhance the quality of communications against noise phenomena which is a problem in communication systems. This paper contributes towards a new non-linear embedded ANC based Artificial Neural Network (ANN) in digital signal processing and backpropagation (BP) of the gradient algorithm. This system is usually required for non-linear adaptive processing digital signals. The neuronal ANC estimates the noise path and subtracting noise from a received signal by minimizing a cost function. It is the mean square error. Thus, also the filter weights are adaptively updated. In this work, we designed and simulated our intelligent embedded ANC model with the help of MATLAB\Simulink software. The proposed system was designed by using embedded functions in Simulink. In addition, all simulation results are performed and verified using Signal Noise to Ratio (SNR) and Mean Square Error (MSE), number of iteration, neuronal architecture, criteria and it has been compared in various scenarios.  Finally, a study and analysis on convergence of neuronal ANC based backpropagation of the gradient algorithm demonstrate that our proposed system can effectively improve the quality of voice communications against the undesired noise. It also provides faster convergence during the back propagation of the gradient. Furthermore, the best values of SNR and MSE show the effectiveness of the proposed model

    Development and Validation of an optimized syndromes block for reed solomon decoder

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    Reed Solomon decoder plays an indispensable role in many applications involving data transmission, storage applications and Video broadcasting DVB-T and DVB-S2. In this work we propose a new optimized parallel syndrome block [67] for the Reed Solomon RS code (15,11) used in digital Video broadcasting DVB-T. Therefore, this proposed parallel block is compared to the serial syndrome block existing. On the basis of this technique a new architecture based on three syndromes in parallel is developed. This technique reduces both the energy consumption and the number of iterations. The RS code (15, 11) is composed of 255 symbols that are multiples of 3. The symbols are entered in parallel in the syndrome block. These decoding algorithms developed in this work are compared with the existing algorithms, and they are evaluated through a simulation using the hardware description language VHDL, then they are implemented on a Xilinx Spartan type FPGA card using the XILINX software

    Development and Validation of an optimized syndromes block for reed solomon decoder

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    Reed Solomon decoder plays an indispensable role in many applications involving data transmission, storage applications and Video broadcasting DVB-T and DVB-S2. In this work we propose a new optimized parallel syndrome block [67] for the Reed Solomon RS code (15,11) used in digital Video broadcasting DVB-T. Therefore, this proposed parallel block is compared to the serial syndrome block existing. On the basis of this technique a new architecture based on three syndromes in parallel is developed. This technique reduces both the energy consumption and the number of iterations. The RS code (15, 11) is composed of 255 symbols that are multiples of 3. The symbols are entered in parallel in the syndrome block. These decoding algorithms developed in this work are compared with the existing algorithms, and they are evaluated through a simulation using the hardware description language VHDL, then they are implemented on a Xilinx Spartan type FPGA card using the XILINX software
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