Application of PICTS to the study of high resistivity materials with very high trap densities for radio-frequency applications

Une famille de substrats silicium sur isolant (SOI) pour les applications de radiocommunication s’appuie sur la présence d’une densité importante de pièges pour empêcher la formation d’une couche de conduction parasite (PSC) sous l’oxyde enterré, néfaste pour les performances radiofréquences (RF).La mesure de la propagation d’un signal RF dans des lignes de transmission coplanaires est utilisée pour valider les performances du substrat à travers divers facteurs de mérite (FoM) comme les pertes d’insertion, la résistivité ou encore les distorsions harmoniques.Toutefois, cette mesure ne donne pas d’information concernant les propriétés des pièges. Ces propriétés sont difficiles à quantifier à cause de la combinaison de la forte résistivité et de l’ancrage du niveau de Fermi, empêchant l’utilisation des techniques conventionnelles comme la mesure de la capacité.Dans cette thèse, nous avons utilisé la technique PICTS (Photo-Induced Current Transient Spectroscopy) qui permet d’étudier les pièges dans les matériaux très résistifs par l’analyse du courant de dépiégeage, suite à l’illumination de la structure de test. La mesure de ce transitoire de courant pour différentes températures permet la construction d’un spectre dont la position en température des pics peut être reliée aux énergies d’activation (niveaux des pièges dans la bande interdite) et aux sections efficaces de capture des centres actifs présents.Deux catégories de substrats ont ensuite été caractérisées par la PICTS, avant d’être comparées avec les FoM RF. Dans la première, les niveaux profonds ont été introduits par la diffusion d’atomes d’or dans un substrat Si. Dans la seconde, la présence de pièges est localisée à la surface d’un substrat Si hautement résistif (HR-Si) par le dépôt d’une couche riche en pièges (TR).Le substrat dopé à l’or nous a permis de valider l’emploi de la technique PICTS pour caractériser des substrats fortement résistifs contenant une grande quantité de pièges. Nous avons observé les niveaux attendus pour l’or d’après la littérature. Nous avons également trouvé des niveaux supplémentaires que nous attribuons à la présence d’autres contaminants. L’inhomogénéité de ces contaminants pourrait expliquer les dispersions spatiales observées dans les mesures RF.Dans les substrats HR-Si avec une couche TR obtenue par dépôt de silicium polycristallin (polySi), la PICTS a permis de montrer que l’activité électrique introduite par les différents joints de grains consiste essentiellement en un ensemble de niveaux profonds. Nous avons observé des populations de pièges distinctes suivant la méthode de dépôt utilisée, montrant ainsi le fort impact sur les propriétés de piégeage du polysilicium de la technique de fabrication des couches.Finalement, même si la PICTS permet d’obtenir des informations concernant l’activité électrique des pièges introduits, elle ne permet pas de remonter de manière aisée aux densités de pièges. De plus, l’assignation du type de porteur capturé par chaque piège n’est pas évidente, principalement à cause d’une contribution parasite observée lors des mesures de spectres. Plusieurs solutions ont été proposées pour surmonter ces difficultés.For radiocommunication applications, a family of silicon on insulator (SOI) substrates relies on the presence of a high trap-density layer to prevent the formation of a parasitic surface conduction (PSC) layer beneath the buried oxide, detrimental for radiofrequency (RF) performances.Measurement of signal propagation through coplanar waveguides provide a way to assess the substrate suitability for those applications by evaluating RF figures of merit (FoM) like insertion loss, effective resistivity or harmonic distortions.However, this measurement does not provide information about the introduced trap properties. Those properties are difficult to quantify because of the association of high resistivity and Fermi level pinning, preventing the application of conventional techniques such as capacitance measurement.In this work, we used the PICTS (Photo-Induced Current Transient Spectroscopy) technique. It allows the study of defects in highly resistive materials by analyzing the detrapping current following sample illumination. The measurement of this transient current for several temperatures allows the construction of a spectrum whose peaks’ temperature position can be related to traps activation energies (trap energy levels in forbidden band) and capture cross sections.Two group of substrates were characterized by PICTS, prior to being compared to RF FoM. In the first category, deep levels were introduced by gold atoms diffusion inside a Si substrate. In the second one, traps are located at the surface of a highly resistive (HR) Si substrate, thanks to the deposition of a trap-rich (TR) layer.The gold-doped substrate enabled us to demonstrate the suitability of PICTS for characterization of large trap densities on highly resistive substrates. We observed the expected trap levels associated to Au in the literature. We also discovered the presence of additional levels that we believe linked to the presence of other contaminants. The non-homogeneity of those contaminants could explain the spatial dispersion that was observed in the RF measurements.For HR-Si substrates with a TR layer, obtained by polycrystalline silicon (polySi) deposition, PICTS has enabled us to show that the electrical activity of grain boundaries mostly consists of several deep levels. We have studied layers deposited with three different processes and have observed two distinct sets of traps, thus demonstrating that the layer deposition method can have strong impact on the trapping properties of the polysilicon.Finally, although PICTS technique allows us to access information about the electrical activity of introduced traps, it cannot easily provide information about trap densities. In addition, trap captured carrier type assignation is not obvious, mainly due to a parasitic contribution observed during spectrum recording. Several solutions were proposed to overcome those difficulties

Study of mobility including ballistic effects in advanced MOSFETs

For many years the transistor dimensions were reduced at each technology generation to increase the circuit performances. However, the transistors have reached dimensions so small that certain hypotheses initially made on the electronic transport inside the channel of the transistor have to be questioned. On the other hand, the computation of the effective mobility is of the utmost importance since it allows to know the quality of the transport inside those devices. The goal of this work was to extract the effective mobility of those transistors from S-parameters measurement, which are known to be free of the self-heating effect for sufficiently high frequencies, while taking into account the modifications on the electronic transport, known as the ballistic effects. Two transistor architectures were tested: the FDSOI and the LP bulk nMOSFETs. To do so, an analytical model taking into account ballistic effects was elaborated. The effective mobility was reconstructed from the small-signal circuit elements of the transistor, extracted during the S-parameters measurement. From those results, it was seen that the ballistic effects become important when the channel length is lower than 100 nm. In that case, the error on the effective mobility by ignoring ballistic effects is equal to 10% and reaches 20% for a channel length of 25 nm. Concerning the errors made on the extraction of the mobility, three sources of errors have been emphasized: errors on the computation of the effective channel length, the series resistances and the inversion charge. By computing plausible errors for those elements, it was shown that the error made on the extraction of the effective mobility due to those elements varies from 17 to 30%. Finally, it was pointed out that, in order to have more reliable values for the effective mobility, the extraction method for the series resistances needs to be improved and the parasitic contribution of the inner fringing capacitance has to be minimized for the computation of the inversion charge.Master de spécialisation en nanotechnologie, Université catholique de Louvain, 201

Improved Split CV Mobility Extraction in 28 nm Fully Depleted Silicon on Insulator Transistors

In this work, we assess the applicability of the well-known split CV technique for mobility extraction in 28 nm FDSOI transistors with gate length down to 25 nm using TCAD simulations. We identify the significant bias dependenceof the parasitic source/drain resistance and the contribution of the inner fringing capacitance as the main sources of error in the conventional split CV extraction. An improved split CV method, correcting for these parasitics, is demonstrated to accurately extract the effective mobility and its dependence on the gate voltage for devices down to 25 nm gate length. Measurements on 28 FDSOI transistors confirm the insights from the TCAD simulations

Characterization and role of deep traps on the radio frequency performances of high resistivity substrates

In this study, high-resistivity gold-implanted silicon substrates developed for radio frequency (RF) applications were characterized. By varying PICTS (Photo-Induced Current Transient Spectroscopy) measurement conditions such as the illumination wavelength, we identified the signature and the nature of four dominant traps. Two were electron traps and the others were hole traps. All of the related defects involved gold atoms. RF simulations of coplanar waveguide transmission lines integrated on these substrates were carried out, based on the trap properties extracted from PICTS results. A good agreement between RF experimental data and simulations was achieved by tuning the trap concentrations. Finally, the gold density extracted from the fit was successfully compared with the secondary ion mass spectrometry profile and an explanation of the role of the traps in RF behavior of the substrate was given

DLTS Investigation of Implantation-induced Defects in 4H-SiC Power Diodes

International audienceElectrically active traps introduced by Aluminium (Al) p+ implantation process step on Schottky, PiN and Junction Barrier Schottky (JBS) 4H-SiC diodes were analysed by Deep Level Transient Spectroscopy (DLTS). Three dominant levels were detected until a depth of 0.4 eV below both conduction and valence band. By increasing the p+/n- ratio of the diode active area, proportional rise of the trap concentrations was observed, confirming the presence of the defects at the p+ implanted laye

Characterization and role of deep traps on the radio frequency performances of high resistivity substrates

In this study, high-resistivity gold-implanted silicon substrates developed for radio frequency (RF) applications were characterized. By varying PICTS (Photo-Induced Current Transient Spectroscopy) measurement conditions such as the illumination wavelength, we identified the signature and the nature of four dominant traps. Two were electron traps and the others were hole traps. All of the related defects involved gold atoms. RF simulations of coplanar waveguide transmission lines integrated on these substrates were carried out, based on the trap properties extracted from PICTS results. A good agreement between RF experimental data and simulations was achieved by tuning the trap concentrations. Finally, the gold density extracted from the fit was successfully compared with the secondary ion mass spectrometry profile and an explanation of the role of the traps in RF behavior of the substrate was given

DLTS Investigation of Implantation-induced Defects in 4H-SiC Power Diodes

International audienceElectrically active traps introduced by Aluminium (Al) p+ implantation process step on Schottky, PiN and Junction Barrier Schottky (JBS) 4H-SiC diodes were analysed by Deep Level Transient Spectroscopy (DLTS). Three dominant levels were detected until a depth of 0.4 eV below both conduction and valence band. By increasing the p+/n- ratio of the diode active area, proportional rise of the trap concentrations was observed, confirming the presence of the defects at the p+ implanted laye

IIT at TREC-2003 Task Classification & Document Structure for Known-Item Search

This year’s TREC 2003 web task incorporated two retrieval tasks into a single set of experiments for Known-Item retrieval. We hypothesized that not all retrieval tasks should use the same retrieval approach when a single search entry point is used. We applied task classifiers on top of traditional web retrieval approaches. Our traditional retrieval is based on fusion of result sets generated by query runs over independent parts of the document structure. Our task classifiers combine query term analysis with known information resources and URL depth. This approach to task classification shows promise: our classified runs improved overall MRR effectiveness over our traditional retrieval results by ~10%; provided an MRR of.665; ranked 87 % of relevant results in the top 10; correctly ranked the #1result 56 % of the time. 67% of the queries performed above the average, and 49 % above the median. Keywords: Known-item search, document structure retrieval, query task classificatio