36 research outputs found
Rad-hard vertical JFET switch for the HV-MUX system of the ATLAS upgrade Inner Tracker
This work presents a new silicon vertical JFET (V-JFET) device, based on the
trenched 3D-detector technology developed at IMB-CNM, to be used as switches
for the High-Voltage powering scheme of the ATLAS upgrade Inner Tracker. The
optimization of the device characteristics is performed by 2D and 3D TCAD
simulations. Special attention has been paid to the on-resistance and the
switch-off and breakdown voltages to meet the specific requirements of the
system. In addition, a set of parameter values has been extracted from the
simulated curves to implement a SPICE model of the proposed V-JFET transistor.
As these devices are expected to operate under very high radiation conditions
during the whole experiment life-time, a study of the radiation damage effects
and the expected degradation on the device performance is also presented at the
end of the paper.Comment: KEYWORDS: Radiation-hard electronics; Voltage distributions; Large
detector systems for particle and astroparticle physics. 9 Pages, 7 Figure
Thermal and hydrodynamic studies for micro-channel cooling for large area silicon sensors in high energy physics experiments
Micro-channel cooling initially aiming at small-sized high-power integrated
circuits is being transferred to the field of high energy physics. Today`s
prospects of micro-fabricating silicon opens a door to a more direct cooling of
detector modules. The challenge in high energy physics is to save material in
the detector construction and to cool large areas. In this paper, we are
investigating micro-channel cooling as a candidate for a future cooling system
for silicon detectors in a generic research and development approach. The work
presented in this paper includes the production and the hydrodynamic and
thermal testing of a micro-channel equipped prototype optimized to achieve a
homogeneous flow distribution. Furthermore, the device was simulated using
finite element methods.Comment: 10 pages, submitted to NIMA (accepted
Lithium ion-induced damage in silicon detectors
Silicon diodes processed by CNM on standard and oxygenated silicon substrates have been irradiated by 58 MeV lithium ions. The radiation-induced effects are very similar to the one observed after proton irradiation: substrate space charge sign inversion (SCSI), lower increase of the effective substrate doping concentration after SCSI for the oxygenated devices. The experimental radiation hardness factor has been determined to be 45.01, within 8.2% with the expected value. These results suggest that 58 MeV Li ions are a suitable radiation source for radiation hardness studies by ions heavier than protons for the future very high luminosity hadron colliders
New evidence of dominant processing effects in standard and oxygenated silicon diodes after neutron irradiation
Abstract Silicon diodes processed on standard and oxygenated silicon substrates by three different manufacturers have been irradiated by neutrons in a nuclear reactor. The leakage current density ( J D ) increase is linear with the neutron fluence. J D and its annealing curve at 80°C do not present any sizeable dependence on substrate oxygenation and/or manufacturing process. The acceptor introduction rate ( β ) of the effective substrate doping concentration ( N eff ) is independent from the oxygen concentration when standard and oxygenated devices from the same manufacturer are considered. On the contrary, β significantly varies from one manufacturer to another showing that the β dependence on the particular process can be important, overtaking the small substrate oxygenation effect. Finally, the average saturation value of the N eff reverse annealing is slightly lower for the oxygenated samples, pointing out a positive effect of the substrate oxygenation even for devices irradiated by neutrons
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Research and Design of a Routing Protocol in Large-Scale Wireless Sensor Networks
无线传感器网络,作为全球未来十大技术之一,集成了传感器技术、嵌入式计算技术、分布式信息处理和自组织网技术,可实时感知、采集、处理、传输网络分布区域内的各种信息数据,在军事国防、生物医疗、环境监测、抢险救灾、防恐反恐、危险区域远程控制等领域具有十分广阔的应用前景。 本文研究分析了无线传感器网络的已有路由协议,并针对大规模的无线传感器网络设计了一种树状路由协议,它根据节点地址信息来形成路由,从而简化了复杂繁冗的路由表查找和维护,节省了不必要的开销,提高了路由效率,实现了快速有效的数据传输。 为支持此路由协议本文提出了一种自适应动态地址分配算——ADAR(AdaptiveDynamicAddre...As one of the ten high technologies in the future, wireless sensor network, which is the integration of micro-sensors, embedded computing, modern network and Ad Hoc technologies, can apperceive, collect, process and transmit various information data within the region. It can be used in military defense, biomedical, environmental monitoring, disaster relief, counter-terrorism, remote control of haz...学位:工学硕士院系专业:信息科学与技术学院通信工程系_通信与信息系统学号:2332007115216
Desarrollo y optimizacion de tecnologias bipolares avanzadas y BICMOS
Centro de Informacion y Documentacion Cientifica (CINDOC). C/Joaquin Costa, 22. 28002 Madrid. SPAIN / CINDOC - Centro de Informaciòn y Documentaciòn CientìficaSIGLEESSpai
TCAD simulation of the electrical performance of the ATLAS18 strip sensor for the HL-LHC
To cope with the increased occupancy and radiation dose expected at the High-Luminosity LHC, the ATLAS experiment will replace its current Inner Detector with the Inner Tracker (ITk), consisting of silicon-based pixel and strip sub-detectors. The strip detector will consist of -in- sensors fabricated by Hamamatsu Photonics, with 300 m signal-generation thickness and approximately 75 m strip pitch. To guide the operation of these sensors in the ITk, it is desirable to understand the basic mechanisms underlying their performance, including the effects of the radiation fluence (up to 1-MeV n/cm) expected during operation. To this end, we have used Sentaurus TCAD to develop a 2D simulation of the ITk large-format strip sensor, based on detailed optical and electrical measurements of the sensors and of test devices fabricated on the same wafers. Current-voltage and capacitance-voltage behaviour is reproduced in the simulation by implementing charge trapping due to defects in the silicon, and the dependence of sensor behaviour on the location of these defects is investigated. Trapping parameters are informed by existing frameworks, such as the Perugia model of surface and bulk radiation damage, and by deep-level transient spectroscopy of test devices on the sensor wafers
Thermal and hydrodynamic studies for micro-channel cooling for large area silicon sensors in high energy physics experiments
Micro-channel cooling initially aiming at small-sized high-power integrated circuits is being transferred to the field of high energy physics. Today`s prospects of micro-fabricating silicon opens a door to a more direct cooling of detector modules. The challenge in high energy physics is to save material in the detector construction and to cool large areas. In this paper, we are investigating micro-channel cooling as a candidate for a future cooling system for silicon detectors in a generic research and development approach. The work presented in this paper includes the production and the hydrodynamic and thermal testing of a micro-channel equipped prototype optimized to achieve a homogeneous flow distribution. Furthermore, the device was simulated using finite element methods
Analysis of MOS capacitor with p-layer with TCAD simulation
The ATLAS18 strip sensors of the ATLAS inner tracker upgrade (ITk) are under production since 2021. Along with the large-format n^+-in-p strip sensor in the center of the wafer, test structures are laid out in the open space for monitoring the performance of the strip sensor and its fabrication process. One of the structures is a 1.2×1.0 mm^2 test chip that includes representative structures of the strips, and Metal-Oxide-Silicon (MOS) capacitors. In addition to the standard MOS capacitor, a MOS capacitor with a p-layer in the surface of silicon, the MOS-p capacitor, is designed with a p-density representative of the p-stop doping for isolating the n+ strips. The C-V curve of the MOS capacitor shows characteristic behavior in the accumulation, depletion, and inversion regions as a function of bias voltage, from which one can estimate the amount of the interface charge. The MOS-p capacitor shows the C-V curve modulated by the properties of the p-layer. With over 50% of the full production complement delivered, we have observed consistent characteristics in the MOS-p capacitors. Rarely and currently only in 3 batches, we have observed abnormalities. To further study them, we have simulated the MOS-p capacitor with TCAD software, which successfully reproduces the normal behavior, including a feature caused by a geometrical setback of the p-layer to the metal area, with the p-density and the interface charge within the expected range. By contrast, the overall shapes of the abnormal cases are only reproduced with 1/10 of the p-density to the specification and possible charge traps in the p-layer area. A smaller but distinctive feature in the behavior may require a non-uniform distribution of the p-density and the interface charge or something else. These simulations help to take final decisions for the batches in production