8,378 research outputs found
House Allocation with Existing Tenants: An Equivalence
In this paper we analyze two house allocation mechanisms each of which is designed to eliminate inefficiencies in real-life house allocation problems where there are both existing tenants and newcomers. The first mechanism chooses the unique core allocation of a "sister" exchange economy which is constructed by assigning each existing tenant her current house and randomly assigning each newcomer a vacant house. The second mechanism -top trading cycles mechanism- first chooses an ordering from a given distribution and next determines the final outcome as follows: Assign first agent her top choice, next agent her top choice among remaining houses and so on, until someone demands house of an existing tenant who is still in the line. At that point modify the queue by inserting her at the top and proceed. Similarly, insert any existing tenant who is not already served at the top of the queue once her house is demanded. Whenever a loop of existing tenants forms, assign each of them the house she demands and proceed. Our main result is that the core based mechanism is equivalent to an extreme case of the top trading cycles mechanism which orders newcomers before the existing tenants.
Suns-V characteristics of high performance kesterite solar cells
Low open circuit voltage () has been recognized as the number one
problem in the current generation of CuZnSn(Se,S) (CZTSSe) solar
cells. We report high light intensity and low temperature Suns-
measurement in high performance CZTSSe devices. The Suns- curves
exhibit bending at high light intensity, which points to several prospective
 limiting mechanisms that could impact the , even at 1 sun for
lower performing samples. These V limiting mechanisms include low bulk
conductivity (because of low hole density or low mobility), bulk or interface
defects including tail states, and a non-ohmic back contact for low carrier
density CZTSSe. The non-ohmic back contact problem can be detected by
Suns- measurements with different monochromatic illumination. These
limiting factors may also contribute to an artificially lower -
diode ideality factor.Comment: 9 pages, 9 figures, 1 supplementary materia
Course Bidding at Business Schools
Mechanisms that rely on course bidding are widely used at Business Schools in order to allocate seats at oversubscribed courses. Bids play two key roles under these mechanisms: Bids are used to infer student preferences and bids are used to determine who have bigger claims on course seats. We show that these two roles may easily conflict and preferences induced from bids may significantly differ from the true preferences. Therefore while these mechanisms are promoted as market mechanisms, they do not necessarily yield market outcomes. The two conflicting roles of bids is a potential source of efficiency loss part of which can be avoided simply by asking students to state their preferences in addition to bidding and thus "separating" the two roles of the bids. While there may be multiple market outcomes under this proposal, there is a market outcome which Pareto dominates any other market outcome.
Semi-Supervised Phoneme Recognition with Recurrent Ladder Networks
Ladder networks are a notable new concept in the field of semi-supervised
learning by showing state-of-the-art results in image recognition tasks while
being compatible with many existing neural architectures. We present the
recurrent ladder network, a novel modification of the ladder network, for
semi-supervised learning of recurrent neural networks which we evaluate with a
phoneme recognition task on the TIMIT corpus. Our results show that the model
is able to consistently outperform the baseline and achieve fully-supervised
baseline performance with only 75% of all labels which demonstrates that the
model is capable of using unsupervised data as an effective regulariser
Efficient ConvNets for Analog Arrays
Analog arrays are a promising upcoming hardware technology with the potential
to drastically speed up deep learning. Their main advantage is that they
compute matrix-vector products in constant time, irrespective of the size of
the matrix. However, early convolution layers in ConvNets map very unfavorably
onto analog arrays, because kernel matrices are typically small and the
constant time operation needs to be sequentially iterated a large number of
times, reducing the speed up advantage for ConvNets. Here, we propose to
replicate the kernel matrix of a convolution layer on distinct analog arrays,
and randomly divide parts of the compute among them, so that multiple kernel
matrices are trained in parallel. With this modification, analog arrays execute
ConvNets with an acceleration factor that is proportional to the number of
kernel matrices used per layer (here tested 16-128). Despite having more free
parameters, we show analytically and in numerical experiments that this
convolution architecture is self-regularizing and implicitly learns similar
filters across arrays. We also report superior performance on a number of
datasets and increased robustness to adversarial attacks. Our investigation
suggests to revise the notion that mixed analog-digital hardware is not
suitable for ConvNets
Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices
In recent years, deep neural networks (DNN) have demonstrated significant
business impact in large scale analysis and classification tasks such as speech
recognition, visual object detection, pattern extraction, etc. Training of
large DNNs, however, is universally considered as time consuming and
computationally intensive task that demands datacenter-scale computational
resources recruited for many days. Here we propose a concept of resistive
processing unit (RPU) devices that can potentially accelerate DNN training by
orders of magnitude while using much less power. The proposed RPU device can
store and update the weight values locally thus minimizing data movement during
training and allowing to fully exploit the locality and the parallelism of the
training algorithm. We identify the RPU device and system specifications for
implementation of an accelerator chip for DNN training in a realistic
CMOS-compatible technology. For large DNNs with about 1 billion weights this
massively parallel RPU architecture can achieve acceleration factors of 30,000X
compared to state-of-the-art microprocessors while providing power efficiency
of 84,000 GigaOps/s/W. Problems that currently require days of training on a
datacenter-size cluster with thousands of machines can be addressed within
hours on a single RPU accelerator. A system consisted of a cluster of RPU
accelerators will be able to tackle Big Data problems with trillions of
parameters that is impossible to address today like, for example, natural
speech recognition and translation between all world languages, real-time
analytics on large streams of business and scientific data, integration and
analysis of multimodal sensory data flows from massive number of IoT (Internet
of Things) sensors.Comment: 19 pages, 5 figures, 2 table
Room Assignment-Rent Division: A Market Approach
A group of friends consider renting a house but they shall first agree on how to allocate its rooms and share the rent. We propose an auction mechanism for room assignment-rent division problems which mimics the market mechanism. Our auction mechanism is efficient, envy-free, individually-rational and it yields a non-negative price to each room whenever that is possible with envy-freeness.
Tarihi, sobada cayır cayır yaktılar
Taha Toros Arşivi, Dosya No: 28- Kağıthaneİstanbul Kalkınma Ajansı (TR10/14/YEN/0033) İstanbul Development Agency (TR10/14/YEN/0033
- …
