Organic film thickness influence on the bias stress instability in Sexithiophene Field Effect Transistors

In this paper, the dynamics of bias stress phenomenon in Sexithiophene (T6) Field Effect Transistors (FETs) has been investigated. T6 FETs have been fabricated by vacuum depositing films with thickness from 10 nm to 130 nm on Si/SiO2 substrates. After the T6 film structural analysis by X-Ray diffraction and the FET electrical investigation focused on carrier mobility evaluation, bias stress instability parameters have been estimated and discussed in the context of existing models. By increasing the film thickness, a clear correlation between the stress parameters and the structural properties of the organic layer has been highlighted. Conversely, the mobility values result almost thickness independent

Highly Scalable Network on Chip for Reconfigurable Systems

An efficient methodology for building the billiontransistors systems on chip of tomorrow is a necessity. Networks on chip promise to be the solution for the numerous technological, economical and productivity problems. We believe that different types of networks will be required for each application domains. Our approach therefore is to have a very flexible network design, highly scalable, that allows to easily accommodate the various needs. This paper presents the design of our network on chip, which is part of the platform we are developing for reconfigurable systems. The present design allows us to instantiate arbitrary network topologies, has a low latency and a high throughput.

Distributed Congestion Control for Packet Switched Networks on Chip

published in Parallel Computing

Closed-loop optical stimulation and recording system with gpu-based real-time spike sorting

Item does not contain fulltex