FPGA implementation of reconfigurable ADPLL network for distributed clock generation

International audienceThis paper presents an FPGA platform for the design and study of network of coupled All-Digital Phase Locked Loops (ADPLLs), destined for clock generation in large synchronous System on Chip (SoC). An implementation of a programmable and reconfigurable 4×4 ADPLL network is described. The paper emphasizes the difference between the FPGA and ASIC-based implementation of such a system, in particular, implementation of digitally controlled oscillators and phase-frequency detector. The FPGA-implemented network allows studying complex phenomena related to coupled ADPLL operation and exploiting stability issues and nonlinear behavior. A dynamic setup mechanism has been proposed for the network, allowing selecting the desirable synchronized state. Experimental results demonstrate the global synchronization of network and performance of the network for different configurations

A Review of the CMOS Buried Double Junction (BDJ) Photodetector and its Applications

A CMOS Buried Double Junction PN (BDJ) photodetector consists of two vertically-stacked photodiodes. It can be operated as a photodiode with improved performance and wavelength-sensitive response. This paper presents a review of this device and its applications. The CMOS implementation and operating principle are firstly described. This includes the description of several key aspects directly related to the device performances, such as surface reflection, photon absorption and electron-hole pair generation, photocurrent and dark current generation, etc. SPICE modelling of the detector is then presented. Next, design and process considerations are proposed in order to improve the BDJ performance. Finally, several BDJ-detector-based image sensors provide a survey of their applications

Etude du bruit dans les capteurs d' images intégrés, type APS

PARIS-BIUSJ-Thèses (751052125) / SudocPARIS-BIUSJ-Physique recherche (751052113) / SudocSudocFranceF

Toward the monitoring of the spinal cord: A feasibility study

International audienceThe usual imaging techniques providing only limited information, there is an unmet need for methods, firstly, to monitor in real time the functional status of the Spinal Cord (SC) and, secondly, to assess the functional consequences of the SC Injuries (SCI) and the effect of therapeutic interventions. To meet these needs, our project aims to investigate a new imaging approach, through the realization of a device for measuring the SC activity. This approach will establish locally and specifically the functional state of the SC in real time, which will provide a breakthrough in surgery, as well as in the care and therapeutic trials for SCI. This paper presents the first results of this research project on pig subjects, focusing on the opto-electrical part, based on Near-InfraRed Spectroscopy (NIRS). Firstly, the pig SC optical characterization was performed in different conditions, using a portable spectrophotometer in order to define the wavelengths of interest and their corresponding optical attenuation. In transmission mode, the Optical Density (OD) was evaluated between 3.5 and 6.5 in the [500; 950] nm range. In reflection mode, a figure between 11 % and 33 % is obtained in the same wavelength range. We find that wavelengths between 600 nm and 940 nm are good candidates to monitor the SC functional activity. Secondly, thanks to these results, a specific opto-electrical system has been designed for the transmission mode only, with adapted light sources and custom probes with its front-end to observe the autonomic functions in the SC. 2 Results on the measured haemodynamic variations, at rest and under stimulation, show in real time the impact of a global stimulus on a local section of the SC. However, with a low AC-to-DC ratio (around 1 %), the SC PhotoPlethysmoGram (PPG) acquisition isn't simple and the best trade-off between power consumption and Signal-to-Noise Ratio (SNR) must be found in the perspective of the Embedded System (ES) development. This study demonstrates, for the first time, the feasibility of the SC activity monitoring using NIRS in transmission mode in a big animal model, where the perfect alignment of the light emitter and receptor isn't necessary due to the diffusive property of the biological media. It contributes to heading towards the use of the Internet of Things (IoT) for medical applications, through the monitoring of the SC during highly invasive processes, such as the stabilization of the spine, in the form of implants and other surgeries, such as that of the aorta, with the use of specific minimally invasive catheters

Bruit dans les oscillateurs contrôlés, application à un réseau de PLLs couplée

National audienc

Spinal cord monitoring by NIRS in reflection and transmission modes

International audienceReal-time monitoring of the spinal cord was achieved on pig model with custom devices operating in both reflection and transmission modes. Although the reflective system was generally preferred, the obtained data wasn’t as rich as in transmission and could conduct to erroneous conclusions

Low-Temperature Electrical Characterization of Fully Depleted eXtra-strained SOI n-MOSFETs with TiN/HfO2 Gate Stack for the 32-nm Technology Node

International audienceIn this paper, experimental results for low-temperature operation on advanced eXtra-strained FD-SOI NMOS transistors with thin film, high-k dielectric, mid-gap metal gate, and with very aggressive dimensions are presented for the 32-nm technology node. The temperature dependence of some key parameters are used to analyze the impact of strain amount on the stress-induced mobility gain, to identify the major physical mechanisms responsible of this enhanced performance, as well as the short channel effect and the narrow channel effect, down to 25 nm gate length and width

An analytical model of the oscillation period for tri-state inverter based DCO

International audienceTri-state inverter based DCO are emerging as an attractive circuit for the implementation of fully digital PLL. In this paper, we first introduce an analytical expression of the tuned period as a function of design and technology parameters. Then, we propose a sizing methodology for the CMOS implementation of a tri-state inverter based DCO. Finally, we applied this methodology to the design of such a DCO. We achieved an average error of 5.4% for our analytical expression compared to simulation results. In conclusion, we showed that our analytical expression and sizing methodology are directly applicable to the design of tri-state inverter based DCO

Impact des bruits d'alimentations et des signaux parasites sur l'intégrité des signaux ultra-rapides

National audiencePour répondre aux besoins croissants des systèmes électroniques en performance et en rapidité, l'électronique numérique a rejoint l'analogique pour former des circuits mixtes ultra-rapides. De cette mixité émerge la nécessité de contrôler l'intégrité des signaux échangés entre les composants, et de leur assurer une bonne protection contre les éventuelles perturbations causées par leur environnement. Cet article présente les caractéristiques des modules critiques présents sur des cartes électroniques à haute densité et à forte puissance employées pour le calcul haute performance, ainsi que les problématiques liées à leur cohabitation

A Self-Sufficient Digitally Controlled Ring Oscillator Robust to Supply Voltage Fluctuation

National audienc