105 research outputs found
Gossip NoC -- Avoiding Timing Side-Channel Attacks through Traffic Management
International audience—The wide use of Multi-processing systems-on-chip (MPSoCs) in embedded systems and the trend to increase the integration between devices have turned these systems vulnerable to attacks. Malicious software executed on compromised IP may become a serious security problem. By snooping the traffic exchanged through the Network-on-chip (NoC), it is possible to infer sensitive information such as secrets keys. NoCs are vulnerable to side channel attacks that exploit traffic interference as timing channels. When multiple IP cores are infected, they can work coordinately to implement a distributed timing attack (DTA). In this work we present for the first time the execution of a DTA and a secure enhanced NoC architecture able to avoid the timing attacks. Results show that our NoC proposal can avoid the DTA with an increase of only 1% in area and 0.8% in power regarding the whole chip design
Desenvolvimento de um dispositivo automatizado para leitura do teste de suscetibilidade (Antibiograma) por disco-difusĂŁo de bactĂ©rias de importância clĂnica
Data processing section for microprocessor-like integrated circuits
A methodology for the design of complex logic VLSI circuits is presented. The target application is deseribed by an algorithm from which the structures of the control section and the data processing section of the integrated circuit are inferred. The Srchltectural aspects are discussed and a model is proposed. A set of functional cells is then presented which implements the data section
Etude des parties operatives a elements modulaires pour processeurs monolithiques
Resumo nĂŁo disponĂve
Etude des parties operatives a elements modulaires pour processeurs monolithiques
Resumo nĂŁo disponĂve
Data processing section for microprocessor-like integrated circuits
A methodology for the design of complex logic VLSI circuits is presented. The target application is deseribed by an algorithm from which the structures of the control section and the data processing section of the integrated circuit are inferred. The Srchltectural aspects are discussed and a model is proposed. A set of functional cells is then presented which implements the data section
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