Urban Youth Leisure, Time Use Research and Quality of Life: the Comparison of Leisure Preferences of University Students in Athens and Larissa, Greece

The role of youth leisure in cities is of special interest and university students (as young and generally more active personalities) hold an important place. The available time of students, exempting usual factors that generally influence leisure (age, sex, work, social class, spatio-temporal constraints), is mainly affected by the subject they choose to study (including their obligations) and by their perception of the city where the institution is located. There are few relevant international studies and even fewer Greek studies. The aim of this paper is to compare the leisure preferences of students in the capital of Greece (Athens) and a medium-sized city in central Greece (Larissa), as well as the impacts of leisure in their quality of life. A questionnaire based survey was used for the data collection. A sample of 440 students in both cities (400 of them in Athens and 40 in Larissa) participated in the research. Important inequalities exist in the most popular activities according to the place of study. One major contradiction (which pinpoints to the time-space interrelationship) is that, although there exists a greater plurality of resources in the capital, there also exist more constraints especially as far as transportation time is concerned.

Experimental study of artificial neural networks using a digital memristor simulator

© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.This paper presents a fully digital implementation of a memristor hardware simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field programmable gate array (FPGA) families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks (ANNs), implementing examples of associative memory and unsupervised learning of spatio-temporal correlations in parallel input streams using a simplified STDP. We provide the full circuit schematics of all our digital circuit designs and comment on the required hardware resources and their scaling trends, thus presenting a design framework for applications based on our hardware simulator.Peer ReviewedPostprint (author's final draft

Cellular Automaton Belousov-Zhabotinsky Model for Binary Full Adder

© 2017 World Scientific Publishing Company. The continuous increment in the performance of classical computers has been driven to its limit. New ways are studied to avoid this oncoming bottleneck and many answers can be found. An example is the Belousov-Zhabotinsky (BZ) reaction which includes some fundamental and essential characteristics that attract chemists, biologists, and computer scientists. Interaction of excitation wave-fronts in BZ system, can be interpreted in terms of logical gates and applied in the design of unconventional hardware components. Logic gates and other more complicated components have been already proposed using different topologies and particular characteristics. In this study, the inherent parallelism and simplicity of Cellular Automata (CAs) modeling is combined with an Oregonator model of light-sensitive version of BZ reaction. The resulting parallel and computationally-inexpensive model has the ability to simulate a topology that can be considered as a one-bit full adder digital component towards the design of an Arithmetic Logic Unit (ALU)

Experience on material implication computing with an electromechanical memristor emulator

Memristors are being considered as a promising emerging device able to introduce new paradigms in both data storage and computing. In this paper the authors introduce the concept of a quasi-ideal experimental device that emulates the fundamental behavior of a memristor based on an electro- mechanical organization. By using this emulator, results about the experimental implementation of an unconventional material implication-based data-path equivalent to the i-4004 are presented and experimentally demonstrated. The use of the proposed quasi-ideal device allows the evaluation of this new computing paradigm, based on the resistance domain, without incorporating the disturbance of process and cycle to cycle variabilities observed in real nowadays devices that cause a limit in yield and behavior.Peer ReviewedPostprint (published version