SPRAY PYROLYSIS DEPOSITION FOR GAS SENSOR INTEGRATION IN THE BACKEND OF STANDARD CMOS PROCESSES

ABSTRACT Gas sensors are based on metal oxides, which likely will have a considerable impact on future smart phones, are analyzed by means of simulations. The deposition of a thin tin oxide film at the backend of a CMOS process has enabled the manufacture of integrated gas sensors. A spray pyrolysis technique is implemented for the deposition step, resulting in a thin tin oxide layer with good step coverage and uniformity. A simulation approach for spray pyrolysis deposition is presented, along with a discussion of the gas sensor operation. A sample model for H2 detection is suggested, while our research serves as a step to link the simulation of gassensitive material deposition and gas sensor operation

DEMANDS FOR SPIN-BASED NONVOLATILITY IN EMERGING DIGITAL LOGIC AND MEMORY DEVICES FOR LOW POWER COMPUTING

Miniaturization of semiconductor devices is the main driving force to achieve an outstanding performance of modern integrated circuits. As the industry is focusing on the development of the 3nm technology node, it is apparent that transistor scaling shows signs of saturation. At the same time, the critically high power consumption becomes incompatible with the global demands of sustaining and accelerating the vital industrial growth, prompting an introduction of new solutions for energy efficient computations.Probably the only radically new option to reduce power consumption in novel integrated circuits is to introduce nonvolatility. The data retention without power sources eliminates the leakages and refresh cycles. As the necessity to waste time on initializing the data in temporarily unused parts of the circuit is not needed, nonvolatility also supports an instant-on computing paradigm.The electron spin adds additional functionality to digital switches based on field effect transistors. SpinFETs and SpinMOSFETs are promising devices, with the nonvolatility introduced through relative magnetization orientation between the ferromagnetic source and drain. A successful demonstration of such devices requires resolving several fundamental problems including spin injection from metal ferromagnets to a semiconductor, spin propagation and relaxation, as well as spin manipulation by the gate voltage. However, increasing the spin injection efficiency to boost the magnetoresistance ratio as well as an efficient spin control represent the challenges to be resolved before these devices appear on the market. Magnetic tunnel junctions with large magnetoresistance ratio are perfectly suited as key elements of nonvolatile CMOS-compatible magnetoresistive embedded memory. Purely electrically manipulated spin-transfer torque and spin-orbit torque magnetoresistive memories are superior compared to flash and will potentially compete with DRAM and SRAM. All major foundries announced a near-future production of such memories.Two-terminal magnetic tunnel junctions possess a simple structure, long retention time, high endurance, fast operation speed, and they yield a high integration density. Combining nonvolatile elements with CMOS devices allows for efficient power gating. Shifting data processing capabilities into the nonvolatile segment paves the way for a new low power and high-performance computing paradigm based on an in-memory computing architecture, where the same nonvolatile elements are used to store and to process the information

Modeling of negative bias temperature instability, Journal of Telecommunications and Information Technology, 2007, nr 2

Negative bias temperature instability is regarded as one of the most important reliability concerns of highly scaled PMOS transistors. As a consequence of the continuous downscaling of semiconductor devices this issue has become even more important over the last couple of years due to the high electric fields in the oxide and the routine incorporation of nitrogen. During negative bias temperature stress a shift in important parameters of PMOS transistors, such as the threshold voltage, subthreshold slope, and mobility is observed. Modeling efforts date back to the reaction-diffusion model proposed by Jeppson and Svensson thirty years ago which has been continuously refined since then. Although the reaction-diffusion model is able to explain many experimentally observed characteristics, some microscopic details are still not well understood. Recently, various alternative explanations have been put forward, some of them extending, some of them contradicting the standard reaction-diffusion model. We review these explanations with a special focus on modeling issues

Critical modeling issues of SiGe semiconductor devices, Journal of Telecommunications and Information Technology, 2004, nr 1

We present the state-of-the-art in simulation of silicon-germanium (SiGe) semiconductor devices. The work includes a detailed comparison of device simulators and current transport models. Among the critical modeling issues addressed in the paper, special attention is focused on the description of the anisotropic majority/minority electron mobility in strained SiGe grown on Si. We use a direct approach to obtain scattering parameters (S-parameters) and other derived figures of merit of SiGe heterojunction bipolar transistors (HBTs) by means of small-signal AC-analysis. Results from two-dimensional hydrodynamic simulations ofSiGe HBTs are presented in good agreement with measured data. The examples are chosen to demonstrate technologically important issues which can be addressed and solved by device simulation

Uniaxial Shear Strain as a Mechanism to Increase Spin Lifetime in Thin Film of a SOI-Based Silicon Spin FETs

Abstract In this chapter we investigate spin relaxation in thin silicon films. We employ a kÁp based approach to investigate surface roughness and phonon induced momentum and spin relaxation matrix elements. We show that the spin relaxation matrix elements strongly decrease with shear strain increased. In order to meet computational requirements with actual resources needed for relaxation time calculations, we demonstrate a way to find the subband wave function from the kÁp model analytically. We consider the impact of the surface roughness and phonons on transport and spin characteristics in ultra-thin SOI MOSFET devices. We show that the regions in the momentum space responsible for strong spin relaxation can be efficiently removed by applying uniaxial shear strain. The spin lifetime in strained films can be improved by orders of magnitude

Hydrodynamic modeling of avalanche breakdown in a gate overvoltage protection structure

Abstract The breakdown of an overvoltage protection structure is analyzed in the temperature range from 298 to 523 K. The avalanche generation rates are modeled as a function of the carrier and lattice temperature. The generation rates are proportional to the carrier concentration. Careful attention is given to the pre-breakdown regime and to the breakdown process. The importance of various generation processes to the impact process is studied as well as the in¯uence on variations of the ionization threshold energy and of the energy loss during the impact process. It is shown that the carrier generation inside the junction causes adiabatic carrier cooling, which leads to dierent carrier heating eects at low and high lattice temperature. The behavior of carrier heating at room temperature is strongly aected by the asymmetric ®eld distribution inside the junction. The reason for this is the ®eld dependence of the used trap assisted band to band tunneling model and of the direct band to band tunneling model. It is shown that at room temperature, the onset of hole impact ionization plays an important role for the electron heating. This is dierent at a temperature of 523 K, where the electrons dominate the onset of impact ionization.

Analysis of Thermoelectric Properties of Scaled Silicon Nanowires Using an Atomistic Tight-Binding Model

Low-dimensional materials provide the possibility of improved thermoelectric performance due to the additional length scale degree of freedom for engineering their electronic and thermal properties. As a result of suppressed phonon conduction, large improvements in the thermoelectric figure of merit, ZT, have recently been reported in nanostructures, compared to the raw materials. In addition, low dimensionality can improve a device's power factor, offering an additional enhancement in ZT. In this work the atomistic sp 3 d 5 s* spin-orbit-coupled tight-binding model is used to calculate the electronic structure of silicon nanowires (NWs). The Landauer formalism is applied to calculate an upper limit for the electrical conductivity, the Seebeck coefficient, and the power factor. We examine n-type and p-type nanowires with diameters from 3 nm to 12 nm, in [100], [110], and [111] transport orientations, at different doping concentrations. Using experimental values for the lattice thermal conductivity in nanowires, an upper limit for ZT is computed. We find that at room temperature, scaling the diameter below 7 nm can at most double the power factor and enhance ZT. In some cases, however, scaling does not enhance the performance at all. Orientations, geometries, and subband engineering techniques for optimized designs are discussed

GUIDE: Parallel library-centric application design by a generic scientific simulation environment

Techniques for library-centric application design have already proven to be very useful in the past. The current gain in computer performance is shifted towards the utilisation of multi-core processors which extends the importance of this type of application design in the field of scientific computing, which also poses new difficulties. A parallel generic scientific simulation environment has been developed to ease this transition from single-core to multi-core systems without additional development activity

Interconnect reliability dependence on fast diffusivity paths

a b s t r a c t The reliability of interconnects in modern integrated circuits is determined by the magnitude and direction of the effective valence for electromigration (EM). The effective valence depends on local atomistic configurations of fast diffusivity paths such as metal interfaces, dislocations, and the grain boundary; therefore, microstructural variations lead to a statistically predictable behavior for the EM life time. Quantum mechanical investigations of EM have been carried out on an atomistic level in order to obtain numerically efficient methods for calculating the effective valence. The results of ab initio calculations of the effective valence have been used to parametrize the continuum-level EM models. The impact of fast diffusivity paths on the long term EM behavior is demonstrated with these models