395 research outputs found

    The future of computing beyond Moore's Law.

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    Moore's Law is a techno-economic model that has enabled the information technology industry to double the performance and functionality of digital electronics roughly every 2 years within a fixed cost, power and area. Advances in silicon lithography have enabled this exponential miniaturization of electronics, but, as transistors reach atomic scale and fabrication costs continue to rise, the classical technological driver that has underpinned Moore's Law for 50 years is failing and is anticipated to flatten by 2025. This article provides an updated view of what a post-exascale system will look like and the challenges ahead, based on our most recent understanding of technology roadmaps. It also discusses the tapering of historical improvements, and how it affects options available to continue scaling of successors to the first exascale machine. Lastly, this article covers the many different opportunities and strategies available to continue computing performance improvements in the absence of historical technology drivers. This article is part of a discussion meeting issue 'Numerical algorithms for high-performance computational science'

    SimpleSSD: Modeling Solid State Drives for Holistic System Simulation

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    Existing solid state drive (SSD) simulators unfortunately lack hardware and/or software architecture models. Consequently, they are far from capturing the critical features of contemporary SSD devices. More importantly, while the performance of modern systems that adopt SSDs can vary based on their numerous internal design parameters and storage-level configurations, a full system simulation with traditional SSD models often requires unreasonably long runtimes and excessive computational resources. In this work, we propose SimpleSSD, a highfidelity simulator that models all detailed characteristics of hardware and software, while simplifying the nondescript features of storage internals. In contrast to existing SSD simulators, SimpleSSD can easily be integrated into publicly-available full system simulators. In addition, it can accommodate a complete storage stack and evaluate the performance of SSDs along with diverse memory technologies and microarchitectures. Thus, it facilitates simulations that explore the full design space at different levels of system abstraction.Comment: This paper has been accepted at IEEE Computer Architecture Letters (CAL

    Click Here: Externship Data Management Tools to Increase Productivity (and Promote Sanity)

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    The most significant challenge externship programs face is “insufficient administrative support,” followed closely by “other demands on the faculty’s time,” according to the CSALE survey. And the pressure is only getting worse. The increased record keeping requirements of Standard 304(c), increased student participation due to the ABA’s 6-credit experiential learning requirement and new paid externship positions, plus the ever-present pressure of tight budgets, together are driving the need to find innovative approaches to these mounting administrative burdens. For many of us, the answer to these challenges is finding online data management tools that can manage vast amounts of data efficiently and economically. These tools include high-end suites like CORE ELMS, the familiar Symplicity experiential learning module, and the basic and free Dropbox and Google Suite. This presentation will demonstrate how online tools can help manage externship programs of any size and with any budget, lessening the administrative burden on directors, faculty and staff. In addition, we will discuss ways in which some of the tools have broader applications, including facilitating assessment of programmatic and institutional learning outcomes and sharing data across institutions. In this presentation, four externship directors who use each of these platforms will discuss how their chosen system fits their needs, highlighting its benefits and drawbacks (such as cost, user-friendliness, scope of services, etc.). Each presenter will conduct a live demonstration of their platform’s key features so that the audience can see it in action

    Performance Evaluation of Plasma and Astrophysics Applications on Modern Parallel Vector Systems

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    Abstract. The last decade has witnessed a rapid proliferation of superscalar cache-based microprocessors to build high-end computing (HEC) platforms, primarily because of their generality, scalability, and cost effectiveness. However, the growing gap between sustained and peak performance for full-scale scientific applications on such platforms has become major concern in high performance computing. The latest generation of custom-built parallel vector systems have the potential to address this concern for numerical algorithms with sufficient regularity in their computational structure. In this work, we explore two and three dimensional implementations of a plasma physics application, as well as a leading astrophysics package on some of today's most powerful supercomputing platforms. Results compare performance between the the vector-based Cray X1, Earth Simulator, and newly-released NEC SX-8, with the commodity-based superscalar platforms of the IBM Power3, Intel Itanium2, and AMD Opteron. Overall results show that the SX-8 attains unprecedented aggregate performance across our evaluated applications

    CAP Bench: a benchmark suite for performance and energy evaluation of low-power many-core processors

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    International audienceSUMMARY The constant need for faster and more energy-efficient processors has been stimulating the development of new architectures, such as low-power many-core architectures. Researchers aiming to study these architectures are challenged by peculiar characteristics of some components such as Networks-on-Chip and lack of specific tools to evaluate their performance. In this context, the goal of this paper is to present a benchmark suite to evaluate state-of-the-art low-power many-core architectures such as the Kalray MPPA-256 low-power processor, which features 256 compute cores in a single chip. The benchmark was designed and used to highlight important aspects and details that need to be considered when developing parallel applications for emerging low-power many-core architectures. As a result, this paper demonstrates that the benchmark offers a diverse suite of programs with regard to parallel patterns, job types, communication intensity and task load strategies, suitable for a broad understanding of performance and energy consumption of MPPA-256 and upcoming many-core architectures
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