Object Recognition and Pose Estimation on Embedded Hardware: SURF-Based System Designs Accelerated by FPGA Logic

State-of-the-art object recognition and pose estimation systems often utilize point feature algorithms, which in turn usually require the computing power of conventional PC hardware. In this paper, we describe two embedded systems for object detection and pose estimation using sophisticated point features. The feature detection step of the “Speeded-up Robust Features (SURF)” algorithm is accelerated by a special IP core. The first system performs object detection and is completely implemented in a single medium-size Virtex-5 FPGA. The second system is an augmented reality platform, which consists of an ARM-based microcontroller and intelligent FPGA-based cameras which support the main system

Application of self-assembly techniques in the design of biocompatible protein microarray surfaces

This review focuses on the application of novel technologies for generating biocompatible surfaces for high-throughput screening (HTS) of proteins. Various methods of coupling and spotting proteins on self-assembled monolayer (SAM) surfaces will be described along with the protein chip challenges pertaining to spot homogeneity, morphology, biocompatibility and reproducibility

Application of self-assembly techniques in the design of biocompatible protein microarray surfaces

This review focuses on the application of novel technologies for generating biocompatible surfaces for high-throughput screening (HTS) of proteins. Various methods of coupling and spotting proteins on self-assembled monolayer (SAM) surfaces will be described along with the protein chip challenges pertaining to spot homogeneity, morphology, biocompatibility and reproducibility