An Automatic Testbench Generation Tool For A Systemc Functional Verification Methodology

The advent of new 90nm/130nm VLSI technology and SoC design methodologies, has brought an explosive growth in the complexity of modern electronic circuits. As a result, functional verification has become the major bottleneck in any design How. New methods are required that allow for easier, quicker and more reusable verification. In this paper we propose an automatic verification methodology approach that enables fast, transaction-level, coverage-driven, self-checking and random-constraint functional verification. Our approach uses the SystemC Verification Library (SCV), to synthesize a tool capable of automatically generating test-bench templates. A case study from a real MP3 design is used to show the effectiveness of our approach.6670Bergeron, J., (2002) Functional Verification of HDL Models, , Kluwer Academic Publishers, Second EditionRashinkar, P., Paterson, P., Singh, L., (2001) System-on-a-chip Verification: Methodology & Techniques, , Kluwer Academic Publishers FebruaryBhasker, J., (2002) A SystemC Primer, , Star Galaxy PublishingFerrandi, F., Rendini, M., Sciuto, D., Functional verification for SystemC descriptions using constraint solving (2002) Automation and Test in Europe Conference and Exhibition (DATE'02), p. 0704. , Paris, MarchRegimbal, S., Lemire, J.-F., Savaria, Y., Bois, G., Aboulhamid, M., Baron, A., Automating functional coverage analysis based on an executable specification (2003) Proc. of the International Workshop on System-on-chip for Real-time Applications, Calgary, , JuneDrucker, L., (2003) SystemC Verification Library Speeds Transaction-based Verification, , D&R Industry Articles,EEdesign, EEtimes,FebruaryFournier, L., Arbetman, Y., Levinger, M., Functional verification methodology for microprocessors using the genesys test-program generator (1999) Design, Automation and Test in Europe (DATE '99), p. 434. , Munich, March 09Monaco, J., Holloway, D., Raina, R., Functional verification methodology for PowerPC 604 microprocessor 33rd Design Automation Conference, , DAC 96, Las Vegashttp://www.brazilip.or

Influence of seed size and water restriction on germination of soybean seeds and on early development of seedlings

Germination is a biological process that depends on adequate water supply to embryo development. Water deficit slows this process and depending on intensity and extent of this deficit may cause seed death. Nevertheless, it has not yet been reported whether seed size influences physiological potential, or tolerance to water stress. This study aimed at assessing the effects of seed size, as well as of water stress on germination of the seeds and on early soybean seedling development. The experiment was composed by seeds of 10 soybean cultivars classified by metallic screens with three sizes of oval holes (S12, S13 and S14) and subjected to three water potentials (0, -0.1, and -0.2 MPa), with four replications. Data on genotypes were grouped as replications and arranged on a factorial 3 x 3 (size x water potential), with 40 replications. Data assessed were: first and final count of germination; length and seedling dry weight; and correlation between length/mass of radicle and hypocotyl. It was concluded that under ideal moisture conditions larger seeds have better physiological quality, producing more vigorous seedlings; but, that under water potential of -0.2 MPa smaller seeds produce larger seedlings; and that the hypocotyl is more influenced by water stress than the radicle