2D:4D Suggests a Role of Prenatal Testosterone in Gender Dysphoria

Gender dysphoria (GD) reflects distress caused by incongruence between one’s experienced gender identity and one’s natal (assigned) gender. Previous studies suggest that high levels of prenatal testosterone (T) in natal females and low levels in natal males might contribute to GD. Here, we investigated if the 2D:4D digit ratio, a biomarker of prenatal T effects, is related to GD. We first report results from a large Iranian sample, comparing 2D:4D in 104 transwomen and 89 transmen against controls of the same natal sex. We found significantly lower (less masculine) 2D:4D in transwomen compared to control men. We then conducted random-effects meta-analyses of relevant studies including our own (k = 6, N = 925 for transwomen and k = 6, N = 757 for transmen). In line with the hypothesized prenatal T effects, transwomen showed significantly feminized 2D:4D (d ≈ 0.24). Conversely, transmen showed masculinized 2D:4D (d ≈ − 0.28); however, large unaccounted heterogeneity across studies emerged, which makes this effect less meaningful. These findings support the idea that high levels of prenatal T in natal females and low levels in natal males play a part in the etiology of GD. As we discuss, this adds to the evidence demonstrating the convergent validity of 2D:4D as a marker of prenatal T effects

Evaluating Built-in ECC of FPGA on-chip Memories for the Mitigation of Undervolting Faults

Voltage underscaling below the nominal level is an effective solution for improving energy efficiency in digital circuits, e.g., Field Programmable Gate Arrays (FPGAs). However, further undervolting below a safe voltage level and without accompanying frequency scaling leads to timing related faults, potentially undermining the energy savings. Through experimental voltage underscaling studies on commercial FPGAs, we observed that the rate of these faults exponentially increases for on-chip memories, or Block RAMs (BRAMs). To mitigate these faults, we evaluated the efficiency of the built-in Error-Correction Code (ECC) and observed that more than 90% of the faults are correctable and further 7% are detectable (but not correctable). This efficiency is the result of the single-bit type of these faults, which are then effectively covered by the Single-Error Correction and Double-Error Detection (SECDED) design of the built-in ECC. Finally, motivated by the above experimental observations, we evaluated an FPGA-based Neural Network (NN) accelerator under low-voltage operations, while built-in ECC is leveraged to mitigate undervolting faults and thus, prevent NN significant accuracy loss. In consequence, we achieve 40% of the BRAM power saving through undervolting below the minimum safe voltage level, with a negligible NN accuracy loss, thanks to the substantial fault coverage by the built-in ECC.Comment: 6 pages, 2 figure

The potential of additive manufacturing in the smart factory industrial 4.0: A review

Additive manufacturing (AM) or three-dimensional (3D) printing has introduced a novel production method in design, manufacturing, and distribution to end-users. This technology has provided great freedom in design for creating complex components, highly customizable products, and efficient waste minimization. The last industrial revolution, namely industry 4.0, employs the integration of smart manufacturing systems and developed information technologies. Accordingly, AM plays a principal role in industry 4.0 thanks to numerous benefits, such as time and material saving, rapid prototyping, high efficiency, and decentralized production methods. This review paper is to organize a comprehensive study on AM technology and present the latest achievements and industrial applications. Besides that, this paper investigates the sustainability dimensions of the AM process and the added values in economic, social, and environment sections. Finally, the paper concludes by pointing out the future trend of AM in technology, applications, and materials aspects that have the potential to come up with new ideas for the future of AM explorations

Impact of incomplete ventricular coverage on diagnostic performance of myocardial perfusion imaging.

In the context of myocardial perfusion imaging (MPI) with cardiac magnetic resonance (CMR), there is ongoing debate on the merits of using technically complex acquisition methods to achieve whole-heart spatial coverage, rather than conventional 3-slice acquisition. An adequately powered comparative study is difficult to achieve given the requirement for two separate stress CMR studies in each patient. The aim of this work is to draw relevant conclusions from SPECT MPI by comparing whole-heart versus simulated 3-slice coverage in a large existing dataset. SPECT data from 651 patients with suspected coronary artery disease who underwent invasive angiography were analyzed. A computational approach was designed to model 3-slice MPI by retrospective subsampling of whole- heart data. For both whole-heart and 3-slice approaches, the diagnostic performance and the stress total perfusion deficit (TPD) score-a measure of ischemia extent/severity-were quantified and compared. Diagnostic accuracy for the 3-slice and whole-heart approaches were similar (area under the curve: 0.843 vs. 0.855, respectively; P = 0.07). The majority (54%) of cases missed by 3-slice imaging had primarily apical ischemia. Whole-heart and 3-slice TPD scores were strongly correlated (R2 = 0.93, P < 0.001) but 3-slice TPD showed a small yet significant bias compared to whole-heart TPD (- 1.19%; P < 0.0001) and the 95% limits of agreement were relatively wide (- 6.65% to 4.27%). Incomplete ventricular coverage typically acquired in 3-slice CMR MPI does not significantly affect the diagnostic accuracy. However, 3-slice MPI may fail to detect severe apical ischemia and underestimate the extent/severity of perfusion defects. Our results suggest that caution is required when comparing the ischemic burden between 3-slice and whole-heart datasets, and corroborate the need to establish prognostic thresholds specific to each approach

Fault Characterization Through FPGA Undervolting

The power and energy efficiency of Field Programmable Gate Arrays (FPGAs) are estimated to be up to 20X less than Application Specific Integrated Circuits (ASICs). What is needed to close this gap is aggressive power/energy savings techniques. Such a potentially effective approach is undervolting, which can directly deliver an order of magnitude static and dynamic power savings. However, aggressive undervolting, without accompanying frequency scaling leads to timing related faults, potentially undermining the power savings. Understanding the behavior of these faults and efficiently mitigating them can deliver further power and energy savings in low-voltage designs. In this paper, we conduct a detailed analysis of undervolting FPGA on-chip memories (BRAMs). Through experimental analysis, we find that lowering the supply voltage until a certain conservative level, V min does not introduce any observable fault. For the studied platforms, we measure this voltage guardband gap to be 39% of the nominal level (V nom = 1V, V min = 0.61V). Further undervolting corrupts some of the data bits stored in BRAMs; however, it also reduces the BRAMs power consumption a further 36.1%. When the voltage is lowered below V min , the rate of these faults exponentially increases to 0.06%, by a fully non-uniform distribution over various BRAMs. This paper comprehensively analyzes the behavior of these faults, in terms of rate, type, location, and environmental temperature.The research leading to these results has received funding from the European Union’s Horizon 2020 Programme under the LEGaTO Project (www.legato-project.eu), grant agreement n◦ 780681.Peer ReviewedPostprint (author's final draft

On the Resilience of RTL NN Accelerators: Fault Characterization and Mitigation

Machine Learning (ML) is making a strong resurgence in tune with the massive generation of unstructured data which in turn requires massive computational resources. Due to the inherently compute and power-intensive structure of Neural Networks (NNs), hardware accelerators emerge as a promising solution. However, with technology node scaling below 10nm, hardware accelerators become more susceptible to faults, which in turn can impact the NN accuracy. In this paper, we study the resilience aspects of Register-Transfer Level (RTL) model of NN accelerators, in particular, fault characterization and mitigation. By following a High-Level Synthesis (HLS) approach, first, we characterize the vulnerability of various components of RTL NN. We observed that the severity of faults depends on both i) application-level specifications, i.e., NN data (inputs, weights, or intermediate) and NN layers and ii) architectural-level specifications, i.e., data representation model and the parallelism degree of the underlying accelerator. Second, motivated by characterization results, we present a low-overhead fault mitigation technique that can efficiently correct bit flips, by 47.3% better than state-of-the-art methods.We thank Pradip Bose, Alper Buyuktosunoglu, and Augusto Vega from IBM Watson for their contribution to this work. The research leading to these results has received funding from the European Union’s Horizon 2020 Programme under the LEGaTO Project (www.legato-project.eu), grant agreement nº 780681.Peer ReviewedPostprint (author's final draft

Comprehensive Evaluation of Supply Voltage Underscaling in FPGA on-Chip Memories

In this work, we evaluate aggressive undervolting, i.e., voltage scaling below the nominal level to reduce the energy consumption of Field Programmable Gate Arrays (FPGAs). Usually, voltage guardbands are added by chip vendors to ensure the worst-case process and environmental scenarios. Through experimenting on several FPGA architectures, we measure this voltage guardband to be on average 39% of the nominal level, which in turn, delivers more than an order of magnitude power savings. However, further undervolting below the voltage guardband may cause reliability issues as the result of the circuit delay increase, i.e., start to appear faults. We extensively characterize the behavior of these faults in terms of the rate, location, type, as well as sensitivity to environmental temperature, with a concentration of on-chip memories, or Block RAMs (BRAMs). Finally, we evaluate a typical FPGA-based Neural Network (NN) accelerator under low-voltage BRAM operations. In consequence, the substantial NN energy savings come with the cost of NN accuracy loss. To attain power savings without NN accuracy loss, we propose a novel technique that relies on the deterministic behavior of undervolting faults and can limit the accuracy loss to 0.1% without any timing-slack overhead.Peer ReviewedPostprint (author's final draft

Efficacy of the Biomaterials 3 wt%-nanostrontium-hydroxyapatite-enhanced Calcium Phosphate Cement (nanoSr-CPC) and nanoSr-CPC-incorporated Simvastatin-loaded Poly(lactic-co-glycolic-acid) Microspheres in Osteogenesis Improvement

Aims The purpose of this multi-phase explorative in vivo animal/surgical and in vitro multi-test experimental study was to (1) create a 3 wt%-nanostrontium hydroxyapatite-enhanced calcium phosphate cement (Sr-HA/CPC) for increasing bone formation and (2) creating a simvastatin-loaded poly(lactic-co-glycolic acid) (SIM-loaded PLGA) microspheres plus CPC composite (SIM-loaded PLGA + nanostrontium-CPC). The third goal was the extensive assessment of multiple in vitro and in vivo characteristics of the above experimental explorative products in vitro and in vivo (animal and surgical studies). Methods and results pertaining to Sr-HA/CPC Physical and chemical properties of the prepared Sr-HA/CPC were evaluated. MTT assay and alkaline phosphatase activities, and radiological and histological examinations of Sr-HA/CPC, CPC and negative control were compared. X-ray diffraction (XRD) indicated that crystallinity of the prepared cement increased by increasing the powder-to-liquid ratio. Incorporation of Sr-HA into CPC increased MTT assay (biocompatibility) and ALP activity (P \u3c 0.05). Histomorphometry showed greater bone formation after 4 weeks, after implantation of Sr-HA/CPC in 10 rats compared to implantations of CPC or empty defects in the same rats (n = 30, ANOVA P \u3c 0.05). Methods and results pertaining to SIM-loaded PLGA microspheres + nanostrontium-CPC composite After SEM assessment, the produced composite of microspheres and enhanced CPC were implanted for 8 weeks in 10 rabbits, along with positive and negative controls, enhanced CPC, and enhanced CPC plus SIM (n = 50). In the control group, only a small amount of bone had been regenerated (localized at the boundary of the defect); whereas, other groups showed new bone formation within and around the materials. A significant difference was found in the osteogenesis induced by the groups sham control (16.96 ± 1.01), bone materials (32.28 ± 4.03), nanostrontium-CPC (24.84 ± 2.6), nanostrontium-CPC-simvastatin (40.12 ± 3.29), and SIM-loaded PLGA + nanostrontium-CPC (44.8 ± 6.45) (ANOVA P \u3c 0.001). All the pairwise comparisons were significant (Tukey P \u3c 0.01), except that of nanostrontium-CPC-simvastatin and SIM-loaded PLGA + nanostrontium-CPC. This confirmed the efficacy of the SIM-loaded PLGA + nanostrontium-CPC composite, and its superiority over all materials except SIM-containing nanostrontium-CPC

Tight lower bound to the geometric measure of quantum discord

Dakic, Vedral and Brukner [Physical Review Letters \tf{105},190502 (2010)] gave a geometric measure of quantum discord in a bipartite quantum state as the distance of the state from the closest classical quantum (or zero discord) state and derived an explicit formula for a two qubit state. Further, S.Luo and S.Fu [Physical Review A \tf{82}, 034302 (2010)] obtained a generic form of this geometric measure for a general bipartite state and established a lower bound. In this brief report we obtain a rigorous lower bound to the geometric measure of quantum discord in a general bipartite state which dominates that obtained by S.Luo and S.Fu.Comment: 10 pages,2 figures. In the previous versions, a constraint was ignored while optimizing the second term in Eq.(5), in which case, only a lower bound on the geometric discord can be obtained. The title is also consequently changed. Accepted in Phys.Rev.

Multipartite entanglement in fermionic systems via a geometric measure

We study multipartite entanglement in a system consisting of indistinguishable fermions. Specifically, we have proposed a geometric entanglement measure for N spin-1/2 fermions distributed over 2L modes (single particle states). The measure is defined on the 2L qubit space isomorphic to the Fock space for 2L single particle states. This entanglement measure is defined for a given partition of 2L modes containing m >= 2 subsets. Thus this measure applies to m <= 2L partite fermionic system where L is any finite number, giving the number of sites. The Hilbert spaces associated with these subsets may have different dimensions. Further, we have defined the local quantum operations with respect to a given partition of modes. This definition is generic and unifies different ways of dividing a fermionic system into subsystems. We have shown, using a representative case, that the geometric measure is invariant under local unitaries corresponding to a given partition. We explicitly demonstrate the use of the measure to calculate multipartite entanglement in some correlated electron systems. To the best of our knowledge, there is no usable entanglement measure of m > 3 partite fermionic systems in the literature, so that this is the first measure of multipartite entanglement for fermionic systems going beyond the bipartite and tripartite cases.Comment: 25 pages, 8 figure